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authorRalf Baechle <ralf@linux-mips.org>2005-07-15 15:23:23 +0000
committerRalf Baechle <ralf@linux-mips.org>2005-10-29 19:31:54 +0100
commit1d40cfcd3442a53e98468cdb3e6d4d9a568d76cf (patch)
tree76d3ba7ac251389194b74c4343d7c46231442044 /arch/mips/kernel
parentbdf21b18b4abf983db38f04ef7fec88f47389867 (diff)
Avoid SMP cacheflushes. This is a minor optimization of startup but
will also avoid smp_call_function from doing stupid things when called from a CPU that is not yet marked online. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel')
-rw-r--r--arch/mips/kernel/traps.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 0a3969aa8dc..519b8f18eed 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -1150,6 +1150,7 @@ static inline void signal32_init(void)
extern void cpu_cache_init(void);
extern void tlb_init(void);
+extern void flush_tlb_handlers(void);
void __init per_cpu_trap_init(void)
{
@@ -1348,4 +1349,5 @@ void __init trap_init(void)
#endif
flush_icache_range(ebase, ebase + 0x400);
+ flush_tlb_handlers();
}