diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 2007-10-29 14:23:43 +0000 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2007-10-29 19:35:36 +0000 |
| commit | 38760d40ca61b18b2809e9c28df8b3ff9af8a02b (patch) | |
| tree | dd65b99f1ae919498808506121a2b75217997713 /arch/mips/mips-boards/generic | |
| parent | 1238d5d868a56dcbc743d3ffc9bd3c920258b4cb (diff) | |
[MIPS] time: Replace plat_timer_setup with modern APIs.
plat_timer_setup is no longer getting called.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mips-boards/generic')
| -rw-r--r-- | arch/mips/mips-boards/generic/time.c | 52 |
1 files changed, 22 insertions, 30 deletions
diff --git a/arch/mips/mips-boards/generic/time.c b/arch/mips/mips-boards/generic/time.c index 9d6243a8c15..f02ce6308e5 100644 --- a/arch/mips/mips-boards/generic/time.c +++ b/arch/mips/mips-boards/generic/time.c @@ -127,26 +127,6 @@ unsigned long read_persistent_clock(void) return mc146818_get_cmos_time(); } -void __init plat_time_init(void) -{ - unsigned int est_freq; - - /* Set Data mode - binary. */ - CMOS_WRITE(CMOS_READ(RTC_CONTROL) | RTC_DM_BINARY, RTC_CONTROL); - - est_freq = estimate_cpu_frequency(); - - printk("CPU frequency %d.%02d MHz\n", est_freq/1000000, - (est_freq%1000000)*100/1000000); - - cpu_khz = est_freq / 1000; - - mips_scroll_message(); -#ifdef CONFIG_I8253 /* Only Malta has a PIT */ - setup_pit_timer(); -#endif -} - void __init plat_perf_setup(void) { cp0_perfcount_irq = -1; @@ -166,14 +146,13 @@ void __init plat_perf_setup(void) } } -void __init plat_timer_setup(struct irqaction *irq) +unsigned int __init get_c0_compare_int(void) { #ifdef MSC01E_INT_BASE if (cpu_has_veic) { set_vi_handler(MSC01E_INT_CPUCTR, mips_timer_dispatch); mips_cpu_timer_irq = MSC01E_INT_BASE + MSC01E_INT_CPUCTR; - } - else + } else #endif { if (cpu_has_vint) @@ -181,13 +160,26 @@ void __init plat_timer_setup(struct irqaction *irq) mips_cpu_timer_irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq; } -#ifdef CONFIG_MIPS_MT_SMTC - setup_irq_smtc(mips_cpu_timer_irq, irq, 0x100 << cp0_compare_irq); -#else - setup_irq(mips_cpu_timer_irq, irq); -#endif /* CONFIG_MIPS_MT_SMTC */ -#ifdef CONFIG_SMP - set_irq_handler(mips_cpu_timer_irq, handle_percpu_irq); + return mips_cpu_timer_irq; +} + +void __init plat_time_init(void) +{ + unsigned int est_freq; + + /* Set Data mode - binary. */ + CMOS_WRITE(CMOS_READ(RTC_CONTROL) | RTC_DM_BINARY, RTC_CONTROL); + + est_freq = estimate_cpu_frequency(); + + printk("CPU frequency %d.%02d MHz\n", est_freq/1000000, + (est_freq%1000000)*100/1000000); + + cpu_khz = est_freq / 1000; + + mips_scroll_message(); +#ifdef CONFIG_I8253 /* Only Malta has a PIT */ + setup_pit_timer(); #endif plat_perf_setup(); |