diff options
| author | Ingo Molnar <mingo@elte.hu> | 2009-08-31 17:54:18 +0200 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2009-08-31 18:05:25 +0200 |
| commit | bbe69aa57a7374b51242b95a54eefcf0d0393b7e (patch) | |
| tree | c45e48d11cc9cb81a57c8c27f7243863b117cec8 /arch/mips/mipssim/sim_time.c | |
| parent | a417887637e862b434b293404f2a31ad1f282a58 (diff) | |
| parent | 326ba5010a5429a5a528b268b36a5900d4ab0eba (diff) | |
Merge commit 'v2.6.31-rc8' into core/locking
Merge reason: we were on -rc4, move to -rc8 before applying
a new batch of locking infrastructure changes.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/mips/mipssim/sim_time.c')
| -rw-r--r-- | arch/mips/mipssim/sim_time.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/mips/mipssim/sim_time.c b/arch/mips/mipssim/sim_time.c index 0cea932f124..5492c42f765 100644 --- a/arch/mips/mipssim/sim_time.c +++ b/arch/mips/mipssim/sim_time.c @@ -89,13 +89,13 @@ unsigned __cpuinit get_c0_compare_int(void) if (cpu_has_veic) { set_vi_handler(MSC01E_INT_CPUCTR, mips_timer_dispatch); mips_cpu_timer_irq = MSC01E_INT_BASE + MSC01E_INT_CPUCTR; - } else { -#endif - { - if (cpu_has_vint) - set_vi_handler(cp0_compare_irq, mips_timer_dispatch); - mips_cpu_timer_irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq; + + return mips_cpu_timer_irq; } +#endif + if (cpu_has_vint) + set_vi_handler(cp0_compare_irq, mips_timer_dispatch); + mips_cpu_timer_irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq; return mips_cpu_timer_irq; } |