diff options
| author | H. Peter Anvin <hpa@zytor.com> | 2009-08-26 17:17:51 -0700 |
|---|---|---|
| committer | H. Peter Anvin <hpa@zytor.com> | 2009-08-26 17:24:28 -0700 |
| commit | b855192c08fcb14adbc5d3a7cab182022d433cca (patch) | |
| tree | 3a10cafbfbf98cafacf667eb218c71300b351bfa /arch/mips/pmc-sierra/msp71xx/msp_irq_slp.c | |
| parent | d886c73cd4cf02a71e1650cbcb6176799d78aac1 (diff) | |
| parent | 3e0e1e9c5a327d4dba8490d83ef55c0564e6e8a7 (diff) | |
Merge branch 'x86/urgent' into x86/pat
Reason: Change to is_new_memtype_allowed() in x86/urgent
Resolved semantic conflicts in:
arch/x86/mm/pat.c
arch/x86/mm/ioremap.c
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Diffstat (limited to 'arch/mips/pmc-sierra/msp71xx/msp_irq_slp.c')
| -rw-r--r-- | arch/mips/pmc-sierra/msp71xx/msp_irq_slp.c | 12 |
1 files changed, 2 insertions, 10 deletions
diff --git a/arch/mips/pmc-sierra/msp71xx/msp_irq_slp.c b/arch/mips/pmc-sierra/msp71xx/msp_irq_slp.c index f5f1b8d2bb9..61f39023234 100644 --- a/arch/mips/pmc-sierra/msp71xx/msp_irq_slp.c +++ b/arch/mips/pmc-sierra/msp71xx/msp_irq_slp.c @@ -45,13 +45,6 @@ static inline void mask_msp_slp_irq(unsigned int irq) */ static inline void ack_msp_slp_irq(unsigned int irq) { - mask_slp_irq(irq); - - /* - * only really necessary for 18, 16-14 and sometimes 3:0 (since - * these can be edge sensitive) but it doesn't hurt for the others. - */ - /* check for PER interrupt range */ if (irq < MSP_PER_INTBASE) *SLP_INT_STS_REG = (1 << (irq - MSP_SLP_INTBASE)); @@ -62,8 +55,7 @@ static inline void ack_msp_slp_irq(unsigned int irq) static struct irq_chip msp_slp_irq_controller = { .name = "MSP_SLP", .ack = ack_msp_slp_irq, - .mask = ack_msp_slp_irq, - .mask_ack = ack_msp_slp_irq, + .mask = mask_msp_slp_irq, .unmask = unmask_msp_slp_irq, }; @@ -79,7 +71,7 @@ void __init msp_slp_irq_init(void) /* initialize all the IRQ descriptors */ for (i = MSP_SLP_INTBASE; i < MSP_PER_INTBASE + 32; i++) - set_irq_chip_and_handler(i, &msp_slp_irq_controller + set_irq_chip_and_handler(i, &msp_slp_irq_controller, handle_level_irq); } |