diff options
author | Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 2007-07-24 16:38:04 +0900 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2007-07-24 16:02:48 +0100 |
commit | 18d0e9b4799ff6e43613a068eba289ba4e002535 (patch) | |
tree | aac5230f5c930d2c5d0c0c8709bc88c74c6526d0 /arch/mips | |
parent | cbe7b45c1d0fbf51eea19452ffb56aa3002fe90c (diff) |
[MIPS] ARC: Remove unused arch/mips/arc/console.c
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r-- | arch/mips/arc/console.c | 31 |
1 files changed, 0 insertions, 31 deletions
diff --git a/arch/mips/arc/console.c b/arch/mips/arc/console.c deleted file mode 100644 index 0fe6032999c..00000000000 --- a/arch/mips/arc/console.c +++ /dev/null @@ -1,31 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 1996 David S. Miller (dm@sgi.com) - * Compability with board caches, Ulf Carlsson - */ -#include <linux/kernel.h> -#include <asm/sgialib.h> -#include <asm/bcache.h> - -/* - * IP22 boardcache is not compatible with board caches. Thus we disable it - * during romvec action. Since r4xx0.c is always compiled and linked with your - * kernel, this shouldn't cause any harm regardless what MIPS processor you - * have. - * - * The ARC write and read functions seem to interfere with the serial lines - * in some way. You should be careful with them. - */ - -void prom_putchar(char c) -{ - ULONG cnt; - CHAR it = c; - - bc_disable(); - ArcWrite(1, &it, 1, &cnt); - bc_enable(); -} |