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authorManuel Lauss <mano@roarinelk.homelinux.net>2008-12-21 09:26:20 +0100
committerRalf Baechle <ralf@linux-mips.org>2009-01-11 09:57:26 +0000
commit1820ec1d2b993f3ec00169e881504aa4541a9bf7 (patch)
tree18c7250dd41b227a2d8224a617793f33a09d783e /arch/mips
parent558d1de8ba9ebb1cc3f3062f1371b9330772164f (diff)
MIPS: Alchemy: remove get/set_au1x00_lcd_clock().
There are no in-tree users, so remove them. Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/alchemy/common/clocks.c31
-rw-r--r--arch/mips/alchemy/common/time.c1
-rw-r--r--arch/mips/include/asm/mach-au1x00/au1000.h2
3 files changed, 0 insertions, 34 deletions
diff --git a/arch/mips/alchemy/common/clocks.c b/arch/mips/alchemy/common/clocks.c
index 043429d17c5..a8170fda493 100644
--- a/arch/mips/alchemy/common/clocks.c
+++ b/arch/mips/alchemy/common/clocks.c
@@ -30,7 +30,6 @@
#include <asm/mach-au1x00/au1000.h>
static unsigned int au1x00_clock; /* Hz */
-static unsigned int lcd_clock; /* KHz */
static unsigned long uart_baud_base;
/*
@@ -61,33 +60,3 @@ void set_au1x00_uart_baud_base(unsigned long new_baud_base)
{
uart_baud_base = new_baud_base;
}
-
-/*
- * Calculate the Au1x00's LCD clock based on the current
- * cpu clock and the system bus clock, and try to keep it
- * below 40 MHz (the Pb1000 board can lock-up if the LCD
- * clock is over 40 MHz).
- */
-void set_au1x00_lcd_clock(void)
-{
- unsigned int static_cfg0;
- unsigned int sys_busclk = (get_au1x00_speed() / 1000) /
- ((int)(au_readl(SYS_POWERCTRL) & 0x03) + 2);
-
- static_cfg0 = au_readl(MEM_STCFG0);
-
- if (static_cfg0 & (1 << 11))
- lcd_clock = sys_busclk / 5; /* note: BCLK switching fails with D5 */
- else
- lcd_clock = sys_busclk / 4;
-
- if (lcd_clock > 50000) /* Epson MAX */
- printk(KERN_WARNING "warning: LCD clock too high (%u KHz)\n",
- lcd_clock);
-}
-
-unsigned int get_au1x00_lcd_clock(void)
-{
- return lcd_clock;
-}
-EXPORT_SYMBOL(get_au1x00_lcd_clock);
diff --git a/arch/mips/alchemy/common/time.c b/arch/mips/alchemy/common/time.c
index 563d9390a87..68d714258e9 100644
--- a/arch/mips/alchemy/common/time.c
+++ b/arch/mips/alchemy/common/time.c
@@ -224,7 +224,6 @@ void __init plat_time_init(void)
printk(KERN_INFO "CPU frequency %u.%02u MHz\n",
est_freq / 1000000, ((est_freq % 1000000) * 100) / 1000000);
set_au1x00_speed(est_freq);
- set_au1x00_lcd_clock(); /* program the LCD clock */
#ifdef CONFIG_PM
/*
diff --git a/arch/mips/include/asm/mach-au1x00/au1000.h b/arch/mips/include/asm/mach-au1x00/au1000.h
index a7ba35247c8..d07632e3230 100644
--- a/arch/mips/include/asm/mach-au1x00/au1000.h
+++ b/arch/mips/include/asm/mach-au1x00/au1000.h
@@ -97,8 +97,6 @@ extern void set_au1x00_speed(unsigned int new_freq);
extern unsigned int get_au1x00_speed(void);
extern void set_au1x00_uart_baud_base(unsigned long new_baud_base);
extern unsigned long get_au1x00_uart_baud_base(void);
-extern void set_au1x00_lcd_clock(void);
-extern unsigned int get_au1x00_lcd_clock(void);
/*
* Every board describes its IRQ mapping with this table.