diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2009-03-30 10:23:53 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-03-30 10:23:53 -0700 |
commit | ebc8eca169be0283d5a7ab54c4411dd59cfb0f27 (patch) | |
tree | 831f6d577da3469e3154bf29409281c640bb67df /arch/powerpc/Kconfig | |
parent | 25c1a411e8a0a709abe3449866125dc290711ea8 (diff) | |
parent | 9ff9a26b786c35ee8d2a66222924a807ec851a9f (diff) |
Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (180 commits)
powerpc: clean up ssi.txt, add definition for fsl,ssi-asynchronous
powerpc/85xx: Add support for the "socrates" board (MPC8544).
powerpc: Fix bugs introduced by sysfs changes
powerpc: Sanitize stack pointer in signal handling code
powerpc: Add write barrier before enabling DTL flags
powerpc/83xx: Update ranges in gianfar node to match other dts
powerpc/86xx: Move gianfar mdio nodes under the ethernet nodes
powerpc/85xx: Move gianfar mdio nodes under the ethernet nodes
powerpc/83xx: Move gianfar mdio nodes under the ethernet nodes
powerpc/83xx: Add power management support for MPC837x boards
powerpc/mm: Introduce early_init_mmu() on 64-bit
powerpc/mm: Add option for non-atomic PTE updates to ppc64
powerpc/mm: Fix printk type warning in mmu_context_nohash
powerpc/mm: Rename arch/powerpc/kernel/mmap.c to mmap_64.c
powerpc/mm: Merge various PTE bits and accessors definitions
powerpc/mm: Tweak PTE bit combination definitions
powerpc/cell: Fix iommu exception reporting
powerpc/mm: e300c2/c3/c4 TLB errata workaround
powerpc/mm: Used free register to save a few cycles in SW TLB miss handling
powerpc/mm: Remove unused register usage in SW TLB miss handling
...
Diffstat (limited to 'arch/powerpc/Kconfig')
-rw-r--r-- | arch/powerpc/Kconfig | 74 |
1 files changed, 47 insertions, 27 deletions
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig index 74cc312c347..ad6b1c084fe 100644 --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig @@ -111,6 +111,7 @@ config PPC select HAVE_FTRACE_MCOUNT_RECORD select HAVE_DYNAMIC_FTRACE select HAVE_FUNCTION_TRACER + select HAVE_FUNCTION_GRAPH_TRACER select ARCH_WANT_OPTIONAL_GPIOLIB select HAVE_IDE select HAVE_IOREMAP_PROT @@ -312,7 +313,7 @@ config ARCH_ENABLE_MEMORY_HOTREMOVE config KEXEC bool "kexec system call (EXPERIMENTAL)" - depends on (PPC_PRPMC2800 || PPC_MULTIPLATFORM) && EXPERIMENTAL + depends on BOOK3S && EXPERIMENTAL help kexec is a system call that implements the ability to shutdown your current kernel, and to start another kernel. It is like a reboot @@ -409,6 +410,18 @@ config PPC_HAS_HASH_64K depends on PPC64 default n +config STDBINUTILS + bool "Using standard binutils settings" + depends on 44x + default y + help + Turning this option off allows you to select 256KB PAGE_SIZE on 44x. + Note, that kernel will be able to run only those applications, + which had been compiled using binutils later than 2.17.50.0.3 with + '-zmax-page-size' set to 256K (the default is 64K). Or, if using + the older binutils, you can patch them with a trivial patch, which + changes the ELF_MAXPAGESIZE definition from 0x10000 to 0x40000. + choice prompt "Page size" default PPC_4K_PAGES @@ -444,6 +457,19 @@ config PPC_64K_PAGES bool "64k page size" if 44x || PPC_STD_MMU_64 select PPC_HAS_HASH_64K if PPC_STD_MMU_64 +config PPC_256K_PAGES + bool "256k page size" if 44x + depends on !STDBINUTILS && (!SHMEM || BROKEN) + help + Make the page size 256k. + + As the ELF standard only requires alignment to support page + sizes up to 64k, you will need to compile all of your user + space applications with a non-standard binutils settings + (see the STDBINUTILS description for details). + + Say N unless you know what you are doing. + endchoice config FORCE_MAX_ZONEORDER @@ -456,6 +482,8 @@ config FORCE_MAX_ZONEORDER default "9" if PPC_STD_MMU_32 && PPC_16K_PAGES range 7 64 if PPC_STD_MMU_32 && PPC_64K_PAGES default "7" if PPC_STD_MMU_32 && PPC_64K_PAGES + range 5 64 if PPC_STD_MMU_32 && PPC_256K_PAGES + default "5" if PPC_STD_MMU_32 && PPC_256K_PAGES range 11 64 default "11" help @@ -594,6 +622,7 @@ config FSL_SOC config FSL_PCI bool select PPC_INDIRECT_PCI + select PCI_QUIRKS config 4xx_SOC bool @@ -730,6 +759,22 @@ config LOWMEM_SIZE hex "Maximum low memory size (in bytes)" if LOWMEM_SIZE_BOOL default "0x30000000" +config LOWMEM_CAM_NUM_BOOL + bool "Set number of CAMs to use to map low memory" + depends on ADVANCED_OPTIONS && FSL_BOOKE + help + This option allows you to set the maximum number of CAM slots that + will be used to map low memory. There are a limited number of slots + available and even more limited number that will fit in the L1 MMU. + However, using more entries will allow mapping more low memory. This + can be useful in optimizing the layout of kernel virtual memory. + + Say N here unless you know what you are doing. + +config LOWMEM_CAM_NUM + int "Number of CAMs to use to map low memory" if LOWMEM_CAM_NUM_BOOL + default 3 + config RELOCATABLE bool "Build a relocatable kernel (EXPERIMENTAL)" depends on EXPERIMENTAL && ADVANCED_OPTIONS && FLATMEM && FSL_BOOKE @@ -794,7 +839,7 @@ config PHYSICAL_START config PHYSICAL_ALIGN hex - default "0x10000000" if FSL_BOOKE + default "0x04000000" if FSL_BOOKE help This value puts the alignment restrictions on physical address where kernel is loaded and run from. Kernel is compiled for an @@ -815,31 +860,6 @@ config TASK_SIZE default "0x80000000" if PPC_PREP || PPC_8xx default "0xc0000000" -config CONSISTENT_START_BOOL - bool "Set custom consistent memory pool address" - depends on ADVANCED_OPTIONS && NOT_COHERENT_CACHE - help - This option allows you to set the base virtual address - of the consistent memory pool. This pool of virtual - memory is used to make consistent memory allocations. - -config CONSISTENT_START - hex "Base virtual address of consistent memory pool" if CONSISTENT_START_BOOL - default "0xfd000000" if (NOT_COHERENT_CACHE && 8xx) - default "0xff100000" if NOT_COHERENT_CACHE - -config CONSISTENT_SIZE_BOOL - bool "Set custom consistent memory pool size" - depends on ADVANCED_OPTIONS && NOT_COHERENT_CACHE - help - This option allows you to set the size of the - consistent memory pool. This pool of virtual memory - is used to make consistent memory allocations. - -config CONSISTENT_SIZE - hex "Size of consistent memory pool" if CONSISTENT_SIZE_BOOL - default "0x00200000" if NOT_COHERENT_CACHE - config PIN_TLB bool "Pinned Kernel TLBs (860 ONLY)" depends on ADVANCED_OPTIONS && 8xx |