aboutsummaryrefslogtreecommitdiff
path: root/arch/powerpc/boot/dts
diff options
context:
space:
mode:
authorStefan Roese <sr@denx.de>2008-03-26 22:42:55 +1100
committerJosh Boyer <jwboyer@linux.vnet.ibm.com>2008-03-26 07:28:01 -0500
commit99d8be052e248e09abf51d4a656717259bf9b930 (patch)
treede798fbb563d13b330af908f8653ad9a8cd1bc74 /arch/powerpc/boot/dts
parent2a7069190e7a7f19bd37e8c08e2bf02c8d6330f7 (diff)
[POWERPC] 4xx: Add L2 cache node to AMCC Taishan dts file
This patch adds the L2 cache node to the Taishan 440GX dts file. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Diffstat (limited to 'arch/powerpc/boot/dts')
-rw-r--r--arch/powerpc/boot/dts/taishan.dts10
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/taishan.dts b/arch/powerpc/boot/dts/taishan.dts
index 3d0334cec55..96d033d6c05 100644
--- a/arch/powerpc/boot/dts/taishan.dts
+++ b/arch/powerpc/boot/dts/taishan.dts
@@ -104,6 +104,16 @@
// FIXME: anything else?
};
+ L2C0: l2c {
+ compatible = "ibm,l2-cache-440gx", "ibm,l2-cache";
+ dcr-reg = <20 8 /* Internal SRAM DCR's */
+ 30 8>; /* L2 cache DCR's */
+ cache-line-size = <20>; /* 32 bytes */
+ cache-size = <40000>; /* L2, 256K */
+ interrupt-parent = <&UIC2>;
+ interrupts = <17 1>;
+ };
+
plb {
compatible = "ibm,plb-440gx", "ibm,plb4";
#address-cells = <2>;