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authorDomen Puncer <domen.puncer@telargo.com>2007-05-07 01:38:49 +1000
committerPaul Mackerras <paulus@samba.org>2007-05-07 20:31:15 +1000
commit5cae84c9710cbb780bcbc96ac842a9e539f059ad (patch)
tree1042167239a7e1d65757764a87be3a48bc029566 /arch/powerpc/boot
parent0d0f4bc70e19f8782996793c3905bce14a7cabd7 (diff)
[POWERPC] lite5200(b) support for i2c
Add fsl-i2c to mpc5200 i2c node in device tree, and enable FSL_SOC. Tested to work with built-in eeprom on lite5200b. Signed-off-by: Domen Puncer <domen.puncer@telargo.com> Signed-off-by: Sylvain Munaut <tnt@246tNt.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc/boot')
-rw-r--r--arch/powerpc/boot/dts/lite5200.dts6
-rw-r--r--arch/powerpc/boot/dts/lite5200b.dts6
2 files changed, 8 insertions, 4 deletions
diff --git a/arch/powerpc/boot/dts/lite5200.dts b/arch/powerpc/boot/dts/lite5200.dts
index 6e2650dbca5..e13ac6ef05a 100644
--- a/arch/powerpc/boot/dts/lite5200.dts
+++ b/arch/powerpc/boot/dts/lite5200.dts
@@ -318,20 +318,22 @@
i2c@3d00 {
device_type = "i2c";
- compatible = "mpc5200-i2c";
+ compatible = "mpc5200-i2c\0fsl-i2c";
cell-index = <0>;
reg = <3d00 40>;
interrupts = <2 f 0>;
interrupt-parent = <500>;
+ fsl5200-clocking;
};
i2c@3d40 {
device_type = "i2c";
- compatible = "mpc5200-i2c";
+ compatible = "mpc5200-i2c\0fsl-i2c";
cell-index = <1>;
reg = <3d40 40>;
interrupts = <2 10 0>;
interrupt-parent = <500>;
+ fsl5200-clocking;
};
sram@8000 {
device_type = "sram";
diff --git a/arch/powerpc/boot/dts/lite5200b.dts b/arch/powerpc/boot/dts/lite5200b.dts
index 5ba8100c1b3..00211b39a34 100644
--- a/arch/powerpc/boot/dts/lite5200b.dts
+++ b/arch/powerpc/boot/dts/lite5200b.dts
@@ -323,20 +323,22 @@
i2c@3d00 {
device_type = "i2c";
- compatible = "mpc5200b-i2c\0mpc5200-i2c";
+ compatible = "mpc5200b-i2c\0mpc5200-i2c\0fsl-i2c";
cell-index = <0>;
reg = <3d00 40>;
interrupts = <2 f 0>;
interrupt-parent = <500>;
+ fsl5200-clocking;
};
i2c@3d40 {
device_type = "i2c";
- compatible = "mpc5200b-i2c\0mpc5200-i2c";
+ compatible = "mpc5200b-i2c\0mpc5200-i2c\0fsl-i2c";
cell-index = <1>;
reg = <3d40 40>;
interrupts = <2 10 0>;
interrupt-parent = <500>;
+ fsl5200-clocking;
};
sram@8000 {
device_type = "sram";