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authorDavid Gibson <david@gibson.dropbear.id.au>2007-07-30 15:55:02 +1000
committerPaul Mackerras <paulus@samba.org>2007-08-17 11:01:51 +1000
commit0d279d47612d1b63155a1d9637a6fc5143dad594 (patch)
treedbe42e6da4aacd499ea3deacccdf9294c7d98006 /arch/powerpc/boot
parent9420dc65ff9e6b67c032286efde823aeb8684670 (diff)
[POWERPC] Fixes to allow use of Ebony's flash chips through physmap_of
This patch contains a handful of small fixes to allow the Ebony's flash to be exposed as MTD devices via the physmap_of driver. Specifically it: - Makes a small addition to the device tree and zImage wrapper to record the correct address for the flash in the device tree based on the board switches as reported via an FPGA register. - Prohibits building the old hard-coded "Ebony" flash map on arch/powerpc kernels, in favour of using physmap_of's device tree based approach. - Enables MTD and physmap_of in the Ebony defconfig. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc/boot')
-rw-r--r--arch/powerpc/boot/dts/ebony.dts1
-rw-r--r--arch/powerpc/boot/ebony.c39
2 files changed, 40 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/ebony.dts b/arch/powerpc/boot/dts/ebony.dts
index c5f99613fc7..27a1463b6ab 100644
--- a/arch/powerpc/boot/dts/ebony.dts
+++ b/arch/powerpc/boot/dts/ebony.dts
@@ -175,6 +175,7 @@
fpga@7,0 {
compatible = "Ebony-FPGA";
reg = <7 0 10>;
+ virtual-reg = <e8300000>;
};
};
diff --git a/arch/powerpc/boot/ebony.c b/arch/powerpc/boot/ebony.c
index 75daedafd0a..eaf0b9bb68d 100644
--- a/arch/powerpc/boot/ebony.c
+++ b/arch/powerpc/boot/ebony.c
@@ -24,6 +24,7 @@
#include "page.h"
#include "ops.h"
#include "reg.h"
+#include "io.h"
#include "dcr.h"
#include "44x.h"
@@ -92,6 +93,43 @@ void ibm440gp_fixup_clocks(unsigned int sysclk, unsigned int ser_clk)
dt_fixup_clock("/plb/opb/serial@40000300", uart1);
}
+#define EBONY_FPGA_PATH "/plb/opb/ebc/fpga"
+#define EBONY_FPGA_FLASH_SEL 0x01
+#define EBONY_SMALL_FLASH_PATH "/plb/opb/ebc/small-flash"
+
+static void ebony_flashsel_fixup(void)
+{
+ void *devp;
+ u32 reg[3] = {0x0, 0x0, 0x80000};
+ u8 *fpga;
+ u8 fpga_reg0 = 0x0;
+
+ devp = finddevice(EBONY_FPGA_PATH);
+ if (!devp)
+ fatal("Couldn't locate FPGA node %s\n\r", EBONY_FPGA_PATH);
+
+ if (getprop(devp, "virtual-reg", &fpga, sizeof(fpga)) != sizeof(fpga))
+ fatal("%s has missing or invalid virtual-reg property\n\r",
+ EBONY_FPGA_PATH);
+
+ fpga_reg0 = in_8(fpga);
+
+ devp = finddevice(EBONY_SMALL_FLASH_PATH);
+ if (!devp)
+ fatal("Couldn't locate small flash node %s\n\r",
+ EBONY_SMALL_FLASH_PATH);
+
+ if (getprop(devp, "reg", reg, sizeof(reg)) != sizeof(reg))
+ fatal("%s has reg property of unexpected size\n\r",
+ EBONY_SMALL_FLASH_PATH);
+
+ /* Invert address bit 14 (IBM-endian) if FLASH_SEL fpga bit is set */
+ if (fpga_reg0 & EBONY_FPGA_FLASH_SEL)
+ reg[1] ^= 0x80000;
+
+ setprop(devp, "reg", reg, sizeof(reg));
+}
+
static void ebony_fixups(void)
{
// FIXME: sysclk should be derived by reading the FPGA registers
@@ -101,6 +139,7 @@ static void ebony_fixups(void)
ibm44x_fixup_memsize();
dt_fixup_mac_addresses(ebony_mac0, ebony_mac1);
ibm4xx_fixup_ebc_ranges("/plb/opb/ebc");
+ ebony_flashsel_fixup();
}
void ebony_init(void *mac0, void *mac1)