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authorAnton Blanchard <anton@samba.org>2009-10-27 18:31:29 +0000
committerPaul Mackerras <paulus@samba.org>2009-10-28 16:13:02 +1100
commit81cd5ae303e88a1e9d3a3e0f1fe8abd100edde16 (patch)
treecebb1b316c4f2eddd99f4caad5460e9abf8ee1c4 /arch/powerpc/kernel/power7-pmu.c
parentbc284e5d9d6da48934a177db92bf8e09b96a9cb8 (diff)
powerpc: perf_event: Enable SDAR in continous sample mode
In continuous sampling mode we want the SDAR to update. While we can select between dcache misses and ERAT (L1-TLB) misses, a decent default is to enable both. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc/kernel/power7-pmu.c')
-rw-r--r--arch/powerpc/kernel/power7-pmu.c6
1 files changed, 1 insertions, 5 deletions
diff --git a/arch/powerpc/kernel/power7-pmu.c b/arch/powerpc/kernel/power7-pmu.c
index 28a4daacdc0..852f7b7f6b4 100644
--- a/arch/powerpc/kernel/power7-pmu.c
+++ b/arch/powerpc/kernel/power7-pmu.c
@@ -51,10 +51,6 @@
#define MMCR1_PMCSEL_MSK 0xff
/*
- * Bits in MMCRA
- */
-
-/*
* Layout of constraint bits:
* 6666555555555544444444443333333333222222222211111111110000000000
* 3210987654321098765432109876543210987654321098765432109876543210
@@ -230,7 +226,7 @@ static int power7_compute_mmcr(u64 event[], int n_ev,
unsigned int hwc[], unsigned long mmcr[])
{
unsigned long mmcr1 = 0;
- unsigned long mmcra = 0;
+ unsigned long mmcra = MMCRA_SDAR_DCACHE_MISS | MMCRA_SDAR_ERAT_MISS;
unsigned int pmc, unit, combine, l2sel, psel;
unsigned int pmc_inuse = 0;
int i;