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author | Rafael J. Wysocki <rjw@sisk.pl> | 2009-08-05 23:56:54 +0200 |
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committer | Rafael J. Wysocki <rjw@sisk.pl> | 2009-08-05 23:56:54 +0200 |
commit | c00aafcd4977769e8728292302ddbbb8b1082fab (patch) | |
tree | 5766bcfbfd7b24816b54298b8ef34054f8cf0fae /arch/powerpc/platforms/85xx/mpc85xx_mds.c | |
parent | 2e6713c7662cc5ebc7346b033c404cb2f708fd51 (diff) | |
parent | 90bc1a658a53f8832ee799685703977a450e5af9 (diff) |
Merge branch 'master' into for-linus
Diffstat (limited to 'arch/powerpc/platforms/85xx/mpc85xx_mds.c')
-rw-r--r-- | arch/powerpc/platforms/85xx/mpc85xx_mds.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c index 60ed9c067b1..bfb32834ab0 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c @@ -233,6 +233,19 @@ static void __init mpc85xx_mds_setup_arch(void) /* Turn UCC1 & UCC2 on */ setbits8(&bcsr_regs[8], BCSR_UCC1_GETH_EN); setbits8(&bcsr_regs[9], BCSR_UCC2_GETH_EN); + } else if (machine_is(mpc8569_mds)) { +#define BCSR7_UCC12_GETHnRST (0x1 << 2) +#define BCSR8_UEM_MARVELL_RST (0x1 << 1) + /* + * U-Boot mangles interrupt polarity for Marvell PHYs, + * so reset built-in and UEM Marvell PHYs, this puts + * the PHYs into their normal state. + */ + clrbits8(&bcsr_regs[7], BCSR7_UCC12_GETHnRST); + setbits8(&bcsr_regs[8], BCSR8_UEM_MARVELL_RST); + + setbits8(&bcsr_regs[7], BCSR7_UCC12_GETHnRST); + clrbits8(&bcsr_regs[8], BCSR8_UEM_MARVELL_RST); } iounmap(bcsr_regs); } |