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authorMichael Ellerman <michael@ellerman.id.au>2006-11-23 00:46:47 +0100
committerPaul Mackerras <paulus@samba.org>2006-12-04 20:40:36 +1100
commit897f112bb42ed9e220ce441e7e52aba3a144a7d6 (patch)
treea4cfa727731319721cfd6fe3702d6b6f5ea85e06 /arch/powerpc/xmon/ppc-dis.c
parent0b8e2e131094d162a836e2afe86e52acbfa05703 (diff)
[POWERPC] Import updated version of ppc disassembly code for xmon
This includes: * version 1.24 of ppc-dis.c * version 1.88 of ppc-opc.c * version 1.23 of ppc.h I can't vouch for the accuracy etc. of these changes, but it brings us into line with binutils - and from a cursory test appears to work fine. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Diffstat (limited to 'arch/powerpc/xmon/ppc-dis.c')
-rw-r--r--arch/powerpc/xmon/ppc-dis.c20
1 files changed, 16 insertions, 4 deletions
diff --git a/arch/powerpc/xmon/ppc-dis.c b/arch/powerpc/xmon/ppc-dis.c
index 08652742fa7..89098f320ad 100644
--- a/arch/powerpc/xmon/ppc-dis.c
+++ b/arch/powerpc/xmon/ppc-dis.c
@@ -1,5 +1,6 @@
/* ppc-dis.c -- Disassemble PowerPC instructions
- Copyright 1994 Free Software Foundation, Inc.
+ Copyright 1994, 1995, 2000, 2001, 2002, 2003, 2004, 2005, 2006
+ Free Software Foundation, Inc.
Written by Ian Lance Taylor, Cygnus Support
This file is part of GDB, GAS, and the GNU binutils.
@@ -16,8 +17,9 @@ the GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this file; see the file COPYING. If not, write to the Free
-Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
+#include <asm/cputable.h>
#include "nonstdio.h"
#include "ansidecl.h"
#include "ppc.h"
@@ -36,6 +38,15 @@ print_insn_powerpc (unsigned long insn, unsigned long memaddr)
dialect = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_COMMON
| PPC_OPCODE_64 | PPC_OPCODE_POWER4 | PPC_OPCODE_ALTIVEC;
+ if (cpu_has_feature(CPU_FTRS_POWER5))
+ dialect |= PPC_OPCODE_POWER5;
+
+ if (cpu_has_feature(CPU_FTRS_CELL))
+ dialect |= PPC_OPCODE_CELL | PPC_OPCODE_ALTIVEC;
+
+ if (cpu_has_feature(CPU_FTRS_POWER6))
+ dialect |= PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_ALTIVEC;
+
/* Get the major opcode of the instruction. */
op = PPC_OP (insn);
@@ -120,7 +131,8 @@ print_insn_powerpc (unsigned long insn, unsigned long memaddr)
}
/* Print the operand as directed by the flags. */
- if ((operand->flags & PPC_OPERAND_GPR) != 0)
+ if ((operand->flags & PPC_OPERAND_GPR) != 0
+ || ((operand->flags & PPC_OPERAND_GPR_0) != 0 && value != 0))
printf("r%ld", value);
else if ((operand->flags & PPC_OPERAND_FPR) != 0)
printf("f%ld", value);
@@ -136,7 +148,7 @@ print_insn_powerpc (unsigned long insn, unsigned long memaddr)
else
{
if (operand->bits == 3)
- printf("cr%d", value);
+ printf("cr%ld", value);
else
{
static const char *cbnames[4] = { "lt", "gt", "eq", "so" };