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authormware@internode.on.net <mware@internode.on.net>2009-06-10 17:01:19 +0000
committerKumar Gala <galak@kernel.crashing.org>2009-06-15 21:45:32 -0500
commite86b4998f00b51f60b4baab9bbef5e07c9407614 (patch)
tree708cdb3c37a8d42aeac762219c7c3e3e76495d7f /arch/powerpc
parent5f28c52003612cccf12dfcbac4d9f0692bd28e67 (diff)
powerpc/fsl: Increase the number of possible localbus banks
Currently the fsl,*lbc devices support 8 banks (ie OR and BR registers). This is adequate for most pq2 and pq3 processors, but not the MPC8280 which has 12 banks. Signed-Off-By: Mark Ware <mware@elphinstone.net> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc')
-rw-r--r--arch/powerpc/include/asm/fsl_lbc.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/powerpc/include/asm/fsl_lbc.h b/arch/powerpc/include/asm/fsl_lbc.h
index 63a4f779f53..1b5a21041f9 100644
--- a/arch/powerpc/include/asm/fsl_lbc.h
+++ b/arch/powerpc/include/asm/fsl_lbc.h
@@ -95,8 +95,8 @@ struct fsl_lbc_bank {
};
struct fsl_lbc_regs {
- struct fsl_lbc_bank bank[8];
- u8 res0[0x28];
+ struct fsl_lbc_bank bank[12];
+ u8 res0[0x8];
__be32 mar; /**< UPM Address Register */
u8 res1[0x4];
__be32 mamr; /**< UPMA Mode Register */