diff options
| author | Martin Schwidefsky <schwidefsky@de.ibm.com> | 2010-03-24 11:49:57 +0100 |
|---|---|---|
| committer | Martin Schwidefsky <sky@mschwide.boeblingen.de.ibm.com> | 2010-03-24 11:49:54 +0100 |
| commit | 06c0dd72aea3985d0ea036f771ebb1d1083bf69f (patch) | |
| tree | 680414dff917976c6b43aaec5688d03c71272e96 /arch/s390/kernel | |
| parent | 7b26d82f5ea7de5667f87bb5ac6570111d7bff9f (diff) | |
[S390] fix boot failures with compressed kernels
Fix two bugs with the kernel image compression:
1) reset the bss section of the compressed vmlinux
2) clear the high half of the registers for 64 bit early enough
for the decompression step
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Diffstat (limited to 'arch/s390/kernel')
| -rw-r--r-- | arch/s390/kernel/head.S | 3 | ||||
| -rw-r--r-- | arch/s390/kernel/head64.S | 2 |
2 files changed, 3 insertions, 2 deletions
diff --git a/arch/s390/kernel/head.S b/arch/s390/kernel/head.S index ca4a62bd862..9d1f76702d4 100644 --- a/arch/s390/kernel/head.S +++ b/arch/s390/kernel/head.S @@ -517,7 +517,10 @@ startup: lhi %r1,2 # mode 2 = esame (dump) sigp %r1,%r0,0x12 # switch to esame mode sam64 # switch to 64 bit mode + larl %r13,4f + lmh %r0,%r15,0(%r13) # clear high-order half jg startup_continue +4: .fill 16,4,0x0 #else mvi __LC_AR_MODE_ID,0 # set ESA flag (mode 0) l %r13,4f-.LPG0(%r13) diff --git a/arch/s390/kernel/head64.S b/arch/s390/kernel/head64.S index 39580e76865..1f70970de0a 100644 --- a/arch/s390/kernel/head64.S +++ b/arch/s390/kernel/head64.S @@ -21,7 +21,6 @@ startup_continue: larl %r1,sched_clock_base_cc mvc 0(8,%r1),__LC_LAST_UPDATE_CLOCK larl %r13,.LPG1 # get base - lmh %r0,%r15,.Lzero64-.LPG1(%r13) # clear high-order half lctlg %c0,%c15,.Lctl-.LPG1(%r13) # load control registers lg %r12,.Lparmaddr-.LPG1(%r13) # pointer to parameter area # move IPL device to lowcore @@ -67,7 +66,6 @@ startup_continue: .L4malign:.quad 0xffffffffffc00000 .Lscan2g:.quad 0x80000000 + 0x20000 - 8 # 2GB + 128K - 8 .Lnop: .long 0x07000700 -.Lzero64:.fill 16,4,0x0 .Lparmaddr: .quad PARMAREA .align 64 |