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authorMagnus Damm <damm@igel.co.jp>2009-02-27 16:41:17 +0900
committerPaul Mundt <lethal@linux-sh.org>2009-02-27 16:41:17 +0900
commit0197f21ca5c5ed0df2a14a60ef073e8163e6533b (patch)
treed5068ed91e1e9b438d46934c50d97dcadd24e8bb /arch/sh/kernel/cpu
parent4f099ebb27211d378304ddcfa507097f5128f5b9 (diff)
sh: prefetch early exception data on sh4/sh4a.
Prefetch early exception data. There is unused space in our exception handler cache line anyway, so this is almost free. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/kernel/cpu')
-rw-r--r--arch/sh/kernel/cpu/sh3/entry.S7
1 files changed, 5 insertions, 2 deletions
diff --git a/arch/sh/kernel/cpu/sh3/entry.S b/arch/sh/kernel/cpu/sh3/entry.S
index 0271fe08de2..e984e94394e 100644
--- a/arch/sh/kernel/cpu/sh3/entry.S
+++ b/arch/sh/kernel/cpu/sh3/entry.S
@@ -463,9 +463,11 @@ tlb_miss:
sts pr, k3 ! save original pr value in k3
handle_exception:
+ mova exception_data, k0
+
! Setup stack and save DSP context (k0 contains original r15 on return)
bsr prepare_stack_save_dsp
- nop
+ PREF(k0)
! Save registers / Switch to bank 0
mov.l 5f, k2 ! vector register address
@@ -556,10 +558,11 @@ ENTRY(handle_interrupt)
11:
#endif /* defined(CONFIG_KGDB) */
sts pr, k3 ! save original pr value in k3
+ mova exception_data, k0
! Setup stack and save DSP context (k0 contains original r15 on return)
bsr prepare_stack_save_dsp
- nop
+ PREF(k0)
! Save registers / Switch to bank 0
bsr save_regs ! needs original pr value in k3