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authorMagnus Damm <damm@igel.co.jp>2009-05-28 11:51:51 +0000
committerPaul Mundt <lethal@linux-sh.org>2009-06-01 15:44:49 +0900
commiteb9b9b56eed280e65a9e194aaeb50a5a75111859 (patch)
tree3c40c0d798b9079dfeda037f0e9680dc2808b449 /arch/sh/kernel
parent5582b0648de6248c67c0b47fa170e5fb15ab4bf1 (diff)
sh: boot word / mode pin support V2
Add mode pin support for the SuperH architecture V2. With this patch applied the board code can add their own function to export the cpu mode pin configuration. In most cases this will be a constant bitmap, but boards that allow reading this from a register can instead read out the pin state from hardware. The code warns if a pin is tested but no board specific mode pin function has been provided. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/kernel')
-rw-r--r--arch/sh/kernel/machvec.c1
-rw-r--r--arch/sh/kernel/setup.c12
2 files changed, 13 insertions, 0 deletions
diff --git a/arch/sh/kernel/machvec.c b/arch/sh/kernel/machvec.c
index c1ea41e5812..548f6607fd0 100644
--- a/arch/sh/kernel/machvec.c
+++ b/arch/sh/kernel/machvec.c
@@ -129,6 +129,7 @@ void __init sh_mv_setup(void)
mv_set(ioport_map);
mv_set(ioport_unmap);
mv_set(irq_demux);
+ mv_set(mode_pins);
if (!sh_mv.mv_nr_irqs)
sh_mv.mv_nr_irqs = NR_IRQS;
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index 00086b23427..050131eec77 100644
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -420,6 +420,18 @@ void __init setup_arch(char **cmdline_p)
#endif
}
+/* processor boot mode configuration */
+int generic_mode_pins(void)
+{
+ pr_warning("generic_mode_pins(): missing mode pin configuration\n");
+ return 0;
+}
+
+int test_mode_pin(int pin)
+{
+ return sh_mv.mv_mode_pins() & (1 << pin);
+}
+
static const char *cpu_name[] = {
[CPU_SH7201] = "SH7201",
[CPU_SH7203] = "SH7203", [CPU_SH7263] = "SH7263",