diff options
| author | Michael Neuling <mikey@neuling.org> | 2008-06-25 14:07:18 +1000 |
|---|---|---|
| committer | Paul Mackerras <paulus@samba.org> | 2008-07-01 11:28:46 +1000 |
| commit | c6e6771b87d4e339d27f1383c8a808ae9b4ee5b8 (patch) | |
| tree | 1900b7350ec685c3a31f2233fd88a57e34725b5c /arch/sparc/kernel | |
| parent | 6f3d8e6947ec98e358514fc0f7b2e37fe88a21bb (diff) | |
powerpc: Introduce VSX thread_struct and CONFIG_VSX
The layout of the new VSR registers and how they overlap on top of the
legacy FPR and VR registers is:
VSR doubleword 0 VSR doubleword 1
----------------------------------------------------------------
VSR[0] | FPR[0] | |
----------------------------------------------------------------
VSR[1] | FPR[1] | |
----------------------------------------------------------------
| ... | |
| ... | |
----------------------------------------------------------------
VSR[30] | FPR[30] | |
----------------------------------------------------------------
VSR[31] | FPR[31] | |
----------------------------------------------------------------
VSR[32] | VR[0] |
----------------------------------------------------------------
VSR[33] | VR[1] |
----------------------------------------------------------------
| ... |
| ... |
----------------------------------------------------------------
VSR[62] | VR[30] |
----------------------------------------------------------------
VSR[63] | VR[31] |
----------------------------------------------------------------
VSX has 64 128bit registers. The first 32 regs overlap with the FP
registers and hence extend them with and additional 64 bits. The
second 32 regs overlap with the VMX registers.
This commit introduces the thread_struct changes required to reflect
this register layout. Ptrace and signals code is updated so that the
floating point registers are correctly accessed from the thread_struct
when CONFIG_VSX is enabled.
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/sparc/kernel')
0 files changed, 0 insertions, 0 deletions