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authorDavid S. Miller <davem@davemloft.net>2006-06-20 01:23:32 -0700
committerDavid S. Miller <davem@davemloft.net>2006-06-20 01:23:32 -0700
commite18e2a00efc8352c131eb8d5a460149fb5776f1c (patch)
treebee6e965d77f4289c37300714d7976c3e19f2994 /arch/sparc64/kernel/pci.c
parent8047e247c899f80c33a23ad7e9e250224f0d26a5 (diff)
[SPARC64]: Move over to GENERIC_HARDIRQS.
This is the long overdue conversion of sparc64 over to the generic IRQ layer. The kernel image is slightly larger, but the BSS is ~60K smaller due to the reduced size of struct ino_bucket. A lot of IRQ implementation details, including ino_bucket, were moved out of asm-sparc64/irq.h and are now private to arch/sparc64/kernel/irq.c, and most of the code in irq.c totally disappeared. One thing that's different at the moment is IRQ distribution, we do it at enable_irq() time. If the cpu mask is ALL then we round-robin using a global rotating cpu counter, else we pick the first cpu in the mask to support single cpu targetting. This is similar to what powerpc's XICS IRQ support code does. This works fine on my UP SB1000, and the SMP build goes fine and runs on that machine, but lots of testing on different setups is needed. Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc64/kernel/pci.c')
-rw-r--r--arch/sparc64/kernel/pci.c38
1 files changed, 0 insertions, 38 deletions
diff --git a/arch/sparc64/kernel/pci.c b/arch/sparc64/kernel/pci.c
index f97ddeb105a..9472580a431 100644
--- a/arch/sparc64/kernel/pci.c
+++ b/arch/sparc64/kernel/pci.c
@@ -47,12 +47,6 @@ struct pci_controller_info *pci_controller_root = NULL;
/* Each PCI controller found gets a unique index. */
int pci_num_controllers = 0;
-/* At boot time the user can give the kernel a command
- * line option which controls if and how PCI devices
- * are reordered at PCI bus probing time.
- */
-int pci_device_reorder = 0;
-
volatile int pci_poke_in_progress;
volatile int pci_poke_cpu = -1;
volatile int pci_poke_faulted;
@@ -316,27 +310,6 @@ static void __init pci_scan_each_controller_bus(void)
p->scan_bus(p);
}
-/* Reorder the pci_dev chain, so that onboard devices come first
- * and then come the pluggable cards.
- */
-static void __init pci_reorder_devs(void)
-{
- struct list_head *pci_onboard = &pci_devices;
- struct list_head *walk = pci_onboard->next;
-
- while (walk != pci_onboard) {
- struct pci_dev *pdev = pci_dev_g(walk);
- struct list_head *walk_next = walk->next;
-
- if (pdev->irq && (__irq_ino(pdev->irq) & 0x20)) {
- list_del(walk);
- list_add(walk, pci_onboard);
- }
-
- walk = walk_next;
- }
-}
-
extern void clock_probe(void);
extern void power_init(void);
@@ -348,9 +321,6 @@ static int __init pcibios_init(void)
pci_scan_each_controller_bus();
- if (pci_device_reorder)
- pci_reorder_devs();
-
isa_init();
ebus_init();
clock_probe();
@@ -441,14 +411,6 @@ EXPORT_SYMBOL(pcibios_bus_to_resource);
char * __init pcibios_setup(char *str)
{
- if (!strcmp(str, "onboardfirst")) {
- pci_device_reorder = 1;
- return NULL;
- }
- if (!strcmp(str, "noreorder")) {
- pci_device_reorder = 0;
- return NULL;
- }
return str;
}