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authorDavid S. Miller <davem@sunset.davemloft.net>2007-08-08 17:11:39 -0700
committerDavid S. Miller <davem@sunset.davemloft.net>2007-08-08 17:33:45 -0700
commit6c70b6fc7b6fc321636a014082d9e32333da1f80 (patch)
treeff0e52bb7ba43b058b7cbb88b952fd268fbe3ad2 /arch/sparc64/kernel/sparc64_ksyms.c
parent68c9f9fd336dc7e793cecad25f8ac40ccaa7a256 (diff)
[SPARC64]: Do not assume sun4v chips have load-twin/store-init support.
Check the cpu type in the OBP device tree before committing to using the optimized Niagara memcpy and memset implementation. If we don't recognize the cpu type, use a completely generic version. Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc64/kernel/sparc64_ksyms.c')
-rw-r--r--arch/sparc64/kernel/sparc64_ksyms.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/sparc64/kernel/sparc64_ksyms.c b/arch/sparc64/kernel/sparc64_ksyms.c
index d270c2f0be0..23fad7ebdd0 100644
--- a/arch/sparc64/kernel/sparc64_ksyms.c
+++ b/arch/sparc64/kernel/sparc64_ksyms.c
@@ -168,6 +168,7 @@ EXPORT_SYMBOL(change_bit);
EXPORT_SYMBOL(__flushw_user);
EXPORT_SYMBOL(tlb_type);
+EXPORT_SYMBOL(sun4v_chip_type);
EXPORT_SYMBOL(get_fb_unmapped_area);
EXPORT_SYMBOL(flush_icache_range);