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authorDavid S. Miller <davem@sunset.davemloft.net>2006-03-02 20:42:53 -0800
committerDavid S. Miller <davem@sunset.davemloft.net>2006-03-20 01:14:16 -0800
commitbcc28ee0bf390df0d81cc9dafe980faef6b2771a (patch)
tree7dfed621399ef9f1bc65a949bf639994b6494485 /arch/sparc64
parentc4f8ef77f941e7d89a52fad1fbe04d59397e2bd1 (diff)
[SPARC64]: Fix sun4v mna winfixup handling.
We were clobbering a base register before we were done using it. Fix a comment typo while we're here. Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc64')
-rw-r--r--arch/sparc64/kernel/sun4v_tlb_miss.S8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/sparc64/kernel/sun4v_tlb_miss.S b/arch/sparc64/kernel/sun4v_tlb_miss.S
index 3eed8db9684..ab23ddb7116 100644
--- a/arch/sparc64/kernel/sun4v_tlb_miss.S
+++ b/arch/sparc64/kernel/sun4v_tlb_miss.S
@@ -18,7 +18,7 @@
/* DEST = (VADDR >> 22)
*
- * Branch to ZERO_CTX_LABEL is context is zero.
+ * Branch to ZERO_CTX_LABEL if context is zero.
*/
#define COMPUTE_TAG_TARGET(DEST, VADDR, CTX, ZERO_CTX_LABEL) \
srlx VADDR, 22, DEST; \
@@ -314,10 +314,10 @@ sun4v_mna:
nop
SET_GL(1)
- ldxa [%g0] ASI_SCRATCHPAD, %g5
- ldx [%g5 + HV_FAULT_D_ADDR_OFFSET], %g5
+ ldxa [%g0] ASI_SCRATCHPAD, %g2
+ ldx [%g2 + HV_FAULT_D_ADDR_OFFSET], %g5
mov HV_FAULT_TYPE_UNALIGNED, %g3
- ldx [%g5 + HV_FAULT_D_CTX_OFFSET], %g4
+ ldx [%g2 + HV_FAULT_D_CTX_OFFSET], %g4
sllx %g3, 16, %g3
or %g4, %g3, %g4
ba,pt %xcc, winfix_mna