diff options
| author | Ingo Molnar <mingo@elte.hu> | 2008-10-27 12:38:02 +0100 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2008-10-27 12:38:02 +0100 |
| commit | 5292ae11babca23c3ff82593630d2d7eebc350a9 (patch) | |
| tree | 30a6c8123b35686098f306ea39398b7621f42054 /arch/x86/include/asm/cache.h | |
| parent | b0f209898f1a177bd503d49215b8c6628797a81c (diff) | |
| parent | 0173a3265b228da319ceb9c1ec6a5682fd1b2d92 (diff) | |
Merge commit 'v2.6.28-rc2' into x86/uv
Diffstat (limited to 'arch/x86/include/asm/cache.h')
| -rw-r--r-- | arch/x86/include/asm/cache.h | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/x86/include/asm/cache.h b/arch/x86/include/asm/cache.h new file mode 100644 index 00000000000..5d367caa0e3 --- /dev/null +++ b/arch/x86/include/asm/cache.h @@ -0,0 +1,20 @@ +#ifndef _ASM_X86_CACHE_H +#define _ASM_X86_CACHE_H + +/* L1 cache line size */ +#define L1_CACHE_SHIFT (CONFIG_X86_L1_CACHE_SHIFT) +#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) + +#define __read_mostly __attribute__((__section__(".data.read_mostly"))) + +#ifdef CONFIG_X86_VSMP +/* vSMP Internode cacheline shift */ +#define INTERNODE_CACHE_SHIFT (12) +#ifdef CONFIG_SMP +#define __cacheline_aligned_in_smp \ + __attribute__((__aligned__(1 << (INTERNODE_CACHE_SHIFT)))) \ + __attribute__((__section__(".data.page_aligned"))) +#endif +#endif + +#endif /* _ASM_X86_CACHE_H */ |