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| author | H. Peter Anvin <hpa@zytor.com> | 2009-08-26 17:17:51 -0700 |
|---|---|---|
| committer | H. Peter Anvin <hpa@zytor.com> | 2009-08-26 17:24:28 -0700 |
| commit | b855192c08fcb14adbc5d3a7cab182022d433cca (patch) | |
| tree | 3a10cafbfbf98cafacf667eb218c71300b351bfa /arch/x86/include/asm/msr-index.h | |
| parent | d886c73cd4cf02a71e1650cbcb6176799d78aac1 (diff) | |
| parent | 3e0e1e9c5a327d4dba8490d83ef55c0564e6e8a7 (diff) | |
Merge branch 'x86/urgent' into x86/pat
Reason: Change to is_new_memtype_allowed() in x86/urgent
Resolved semantic conflicts in:
arch/x86/mm/pat.c
arch/x86/mm/ioremap.c
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Diffstat (limited to 'arch/x86/include/asm/msr-index.h')
| -rw-r--r-- | arch/x86/include/asm/msr-index.h | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index 1692fb5050e..6be7fc254b5 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -246,10 +246,6 @@ #define MSR_IA32_MISC_ENABLE_TURBO_DISABLE (1ULL << 38) #define MSR_IA32_MISC_ENABLE_IP_PREF_DISABLE (1ULL << 39) -/* Intel Model 6 */ -#define MSR_P6_EVNTSEL0 0x00000186 -#define MSR_P6_EVNTSEL1 0x00000187 - /* P4/Xeon+ specific */ #define MSR_IA32_MCG_EAX 0x00000180 #define MSR_IA32_MCG_EBX 0x00000181 |