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authorvenkatesh.pallipadi@intel.com <venkatesh.pallipadi@intel.com>2008-12-18 11:41:32 -0800
committerH. Peter Anvin <hpa@zytor.com>2008-12-18 13:30:16 -0800
commit2520bd3123c00272f818a176c92d03c7d0a113d6 (patch)
tree1c5f3e47243d77573cb4933dadc5224d2fb32686 /arch/x86/include/asm
parent8a7b12f70fb135a1b1d865687de3edcdc780f6d1 (diff)
x86: PAT: add pgprot_writecombine() interface for drivers - v3
Impact: New mm functionality. Add pgprot_writecombine. pgprot_writecombine will be aliased to pgprot_noncached when not supported by the architecture. Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Diffstat (limited to 'arch/x86/include/asm')
-rw-r--r--arch/x86/include/asm/pgtable.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h
index 6968d4f6be3..579f8ceee94 100644
--- a/arch/x86/include/asm/pgtable.h
+++ b/arch/x86/include/asm/pgtable.h
@@ -168,6 +168,9 @@
#ifndef __ASSEMBLY__
+#define pgprot_writecombine pgprot_writecombine
+extern pgprot_t pgprot_writecombine(pgprot_t prot);
+
/*
* ZERO_PAGE is a global shared page that is always zero: used
* for zero-mapped memory areas etc..