aboutsummaryrefslogtreecommitdiff
path: root/arch/x86/kernel/apic/apic.c
diff options
context:
space:
mode:
authorIngo Molnar <mingo@elte.hu>2009-05-12 12:17:30 +0200
committerIngo Molnar <mingo@elte.hu>2009-05-12 12:17:36 +0200
commit6cda3eb62ef42aa5acd649bf99c8db544e0f4051 (patch)
tree93f74ca002f5756c8e157611174f9540b5cf41c0 /arch/x86/kernel/apic/apic.c
parentb9c61b70075c87a8612624736faf4a2de5b1ed30 (diff)
parentcec6be6d1069d697beb490bbb40a290d5ff554a2 (diff)
Merge branch 'x86/apic' into irq/numa
Merge reason: both topics modify the APIC code but were able to do it in parallel so far. An upcoming patch generates a conflict so merge them to avoid the conflict. Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/kernel/apic/apic.c')
-rw-r--r--arch/x86/kernel/apic/apic.c36
1 files changed, 24 insertions, 12 deletions
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index 28f747d61d7..07cffc1214c 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -395,7 +395,7 @@ static void __setup_APIC_LVTT(unsigned int clocks, int oneshot, int irqen)
static void setup_APIC_eilvt(u8 lvt_off, u8 vector, u8 msg_type, u8 mask)
{
- unsigned long reg = (lvt_off << 4) + APIC_EILVT0;
+ unsigned long reg = (lvt_off << 4) + APIC_EILVTn(0);
unsigned int v = (mask << 16) | (msg_type << 8) | vector;
apic_write(reg, v);
@@ -1456,7 +1456,6 @@ static int __init detect_init_APIC(void)
}
mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
- boot_cpu_physical_apicid = 0;
return 0;
}
#else
@@ -1570,6 +1569,8 @@ void __init early_init_lapic_mapping(void)
*/
void __init init_apic_mappings(void)
{
+ unsigned int new_apicid;
+
if (x2apic_mode) {
boot_cpu_physical_apicid = read_apic_id();
return;
@@ -1586,21 +1587,32 @@ void __init init_apic_mappings(void)
} else
apic_phys = mp_lapic_addr;
- set_fixmap_nocache(FIX_APIC_BASE, apic_phys);
- apic_printk(APIC_VERBOSE, "mapped APIC to %08lx (%08lx)\n",
- APIC_BASE, apic_phys);
-
/*
- * Fetch the APIC ID of the BSP in case we have a
- * default configuration (or the MP table is broken).
+ * acpi lapic path already maps that address in
+ * acpi_register_lapic_address()
*/
- if (boot_cpu_physical_apicid == -1U)
- boot_cpu_physical_apicid = read_apic_id();
+ if (!acpi_lapic)
+ set_fixmap_nocache(FIX_APIC_BASE, apic_phys);
+
+ apic_printk(APIC_VERBOSE, "mapped APIC to %08lx (%08lx)\n",
+ APIC_BASE, apic_phys);
- /* lets check if we may to NOP'ify apic operations */
+ /* lets check if we may NOP'ify apic operations */
if (!cpu_has_apic) {
pr_info("APIC: disable apic facility\n");
apic_disable();
+ return;
+ }
+
+ /*
+ * Fetch the APIC ID of the BSP in case we have a
+ * default configuration (or the MP table is broken).
+ */
+ new_apicid = read_apic_id();
+ if (boot_cpu_physical_apicid != new_apicid) {
+ boot_cpu_physical_apicid = new_apicid;
+ apic_version[new_apicid] =
+ GET_APIC_VERSION(apic_read(APIC_LVR));
}
}
@@ -2191,7 +2203,7 @@ static int __cpuinit set_multi(const struct dmi_system_id *d)
{
if (multi)
return 0;
- printk(KERN_INFO "APIC: %s detected, Multi Chassis\n", d->ident);
+ pr_info("APIC: %s detected, Multi Chassis\n", d->ident);
multi = 1;
return 0;
}