diff options
author | Vince Weaver <vince@deater.net> | 2009-07-08 17:46:14 -0400 |
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committer | Ingo Molnar <mingo@elte.hu> | 2009-07-10 10:28:26 +0200 |
commit | 11d1578f9454159c43499d1d8fe8a7d728c176a3 (patch) | |
tree | 2ad986dad1482083c1f61632f851883791d70aea /arch/x86/kernel/asm-offsets_64.c | |
parent | 9590b7ba3fefdfe0c7741f5e2f61faf2ffcea19c (diff) |
perf_counter: Add P6 PMU support
Add basic P6 PMU support. The P6 uses the EVNTSEL0 EN bit to
enable/disable both its counters. We use this for the
global enable/disable, and clear all config bits (except EN)
to disable individual counters.
Actual ia32 hardware doesn't support lfence, so use a locked
op without side-effect to implement a full barrier.
perf stat and perf record seem to function correctly.
[a.p.zijlstra@chello.nl: cleanups and complete the enable/disable code]
Signed-off-by: Vince Weaver <vince@deater.net>
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
LKML-Reference: <Pine.LNX.4.64.0907081718450.2715@pianoman.cluster.toy>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/kernel/asm-offsets_64.c')
0 files changed, 0 insertions, 0 deletions