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authorSimon Arlott <simon@fire.lp0.eu>2007-10-20 01:13:56 +0200
committerAdrian Bunk <bunk@kernel.org>2007-10-20 01:13:56 +0200
commit27b46d7661dc720224813eb4f452e424f1bf3a9a (patch)
tree1683daefc5f245efa5a1c2a3808277b45d21ce72 /arch/x86/kernel/cpu/centaur.c
parent5e71c6051585da46b898b21bd8e5b6df2795f03f (diff)
spelling fixes: arch/i386/
Spelling fixes in arch/i386/. Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Adrian Bunk <bunk@kernel.org>
Diffstat (limited to 'arch/x86/kernel/cpu/centaur.c')
-rw-r--r--arch/x86/kernel/cpu/centaur.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/x86/kernel/cpu/centaur.c b/arch/x86/kernel/cpu/centaur.c
index 473eac883c7..9681fa15ddf 100644
--- a/arch/x86/kernel/cpu/centaur.c
+++ b/arch/x86/kernel/cpu/centaur.c
@@ -53,7 +53,7 @@ static u32 __cpuinit ramtop(void) /* 16388 */
continue;
/*
* Don't MCR over reserved space. Ignore the ISA hole
- * we frob around that catastrophy already
+ * we frob around that catastrophe already
*/
if (e820.map[i].type == E820_RESERVED)
@@ -287,7 +287,7 @@ static void __cpuinit init_c3(struct cpuinfo_x86 *c)
c->x86_capability[5] = cpuid_edx(0xC0000001);
}
- /* Cyrix III family needs CX8 & PGE explicity enabled. */
+ /* Cyrix III family needs CX8 & PGE explicitly enabled. */
if (c->x86_model >=6 && c->x86_model <= 9) {
rdmsr (MSR_VIA_FCR, lo, hi);
lo |= (1<<1 | 1<<7);