diff options
| author | Ingo Molnar <mingo@elte.hu> | 2009-02-26 13:02:23 +0100 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2009-02-26 13:02:23 +0100 |
| commit | 8e818179eb9e8f9e44d8410dd2a25077d026a08e (patch) | |
| tree | 7d08afd30c95c04129c20693d974a18799caeb5a /arch/x86/kernel/cpu/intel.c | |
| parent | 742bd95ba96e19b3f7196c3a0834ebc17c8ba006 (diff) | |
| parent | ecc25fbd6b9e07b33895c61ddf84006b00f55d99 (diff) | |
Merge branch 'x86/core' into perfcounters/core
Conflicts:
arch/x86/kernel/apic/apic.c
arch/x86/kernel/irqinit_32.c
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/kernel/cpu/intel.c')
| -rw-r--r-- | arch/x86/kernel/cpu/intel.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c index 7aeef1d327b..25c559ba8d5 100644 --- a/arch/x86/kernel/cpu/intel.c +++ b/arch/x86/kernel/cpu/intel.c @@ -146,10 +146,10 @@ static void __cpuinit intel_workarounds(struct cpuinfo_x86 *c) */ if ((c->x86 == 15) && (c->x86_model == 1) && (c->x86_mask == 1)) { rdmsr(MSR_IA32_MISC_ENABLE, lo, hi); - if ((lo & (1<<9)) == 0) { + if ((lo & MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE) == 0) { printk (KERN_INFO "CPU: C0 stepping P4 Xeon detected.\n"); printk (KERN_INFO "CPU: Disabling hardware prefetching (Errata 037)\n"); - lo |= (1<<9); /* Disable hw prefetching */ + lo |= MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE; wrmsr (MSR_IA32_MISC_ENABLE, lo, hi); } } |