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| author | Paul Mundt <lethal@linux-sh.org> | 2009-02-12 17:27:56 +0900 |
|---|---|---|
| committer | Paul Mundt <lethal@linux-sh.org> | 2009-02-12 17:27:56 +0900 |
| commit | 41480ae7a383dcffa497decdd97b3cb2caaa18ec (patch) | |
| tree | f1e3afce2cbd0bbc544cd86a73e5b3093eb081c4 /arch/x86/kernel/cpu/intel.c | |
| parent | 508eb2ce222053e51e2243b7add8eeac85b1d250 (diff) | |
| parent | 34aeb43e2d3800f4d8f96feb9f1b49cd506679d5 (diff) | |
Merge branch 'sh/stable-updates'
Diffstat (limited to 'arch/x86/kernel/cpu/intel.c')
| -rw-r--r-- | arch/x86/kernel/cpu/intel.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c index 549f2ada55f..24ff26a38ad 100644 --- a/arch/x86/kernel/cpu/intel.c +++ b/arch/x86/kernel/cpu/intel.c @@ -30,7 +30,7 @@ static void __cpuinit early_init_intel(struct cpuinfo_x86 *c) { /* Unmask CPUID levels if masked: */ - if (c->x86 == 6 && c->x86_model >= 15) { + if (c->x86 > 6 || (c->x86 == 6 && c->x86_model >= 0xd)) { u64 misc_enable; rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable); @@ -291,6 +291,9 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c) ds_init_intel(c); } + if (c->x86 == 6 && c->x86_model == 29 && cpu_has_clflush) + set_cpu_cap(c, X86_FEATURE_CLFLUSH_MONITOR); + #ifdef CONFIG_X86_64 if (c->x86 == 15) c->x86_cache_alignment = c->x86_clflush_size * 2; |