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authorHuang, Ying <ying.huang@intel.com>2008-01-31 22:05:45 +0100
committerIngo Molnar <mingo@elte.hu>2008-01-31 22:05:45 +0100
commitd4387bd3fa1d27e03bc87533c1650e24417c8016 (patch)
tree14103cb3d7d19f05c70ca5747c2c1c452c013dc9 /arch/x86/kernel/cpu
parent5827040df095d8dd6b5ca155dc4bfb5bafcb6ca2 (diff)
x86: c_p_a clflush_cache_range fix
Because in i386 early boot stage, boot_cpu_data may be not available, which makes clflush_cach_range() into infinite loop, which is called by change_page_attr(). This patch fixes this by setting boot_cpu_data.x86_clflush_size in early_cpu_detect(). Signed-off-by: Huang Ying <ying.huang@intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/kernel/cpu')
-rw-r--r--arch/x86/kernel/cpu/common.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index db28aa9e2f6..d608c9ebbfe 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -274,8 +274,10 @@ void __init cpu_detect(struct cpuinfo_x86 *c)
if (c->x86 >= 0x6)
c->x86_model += ((tfms >> 16) & 0xF) << 4;
c->x86_mask = tfms & 15;
- if (cap0 & (1<<19))
+ if (cap0 & (1<<19)) {
c->x86_cache_alignment = ((misc >> 8) & 0xff) * 8;
+ c->x86_clflush_size = ((misc >> 8) & 0xff) * 8;
+ }
}
}
static void __cpuinit early_get_cap(struct cpuinfo_x86 *c)
@@ -317,6 +319,7 @@ static void __init early_cpu_detect(void)
struct cpuinfo_x86 *c = &boot_cpu_data;
c->x86_cache_alignment = 32;
+ c->x86_clflush_size = 32;
if (!have_cpuid_p())
return;