diff options
author | Markus Metzger <markus.t.metzger@googlemail.com> | 2008-11-09 14:29:21 +0100 |
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committer | Ingo Molnar <mingo@elte.hu> | 2008-11-10 08:50:32 +0100 |
commit | f4166c54bfe04f64603974058e44fbd7cfef0ccc (patch) | |
tree | 952c9e53143990dbd6159cb6c2412498d84a49e3 /arch/x86/kernel/cpu | |
parent | f7160c7573615ec82c691e294cf80d920b5d588d (diff) |
x86, bts: DS and BTS initialization
Impact: widen BTS/PEBS ptrace enablement to more CPU models
Move BTS initialisation out of an #ifdef CONFIG_X86_64 guard.
Assume core2 BTS and DS layout for future models of family 6 processors.
Signed-off-by: Markus Metzger <markus.t.metzger@intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/kernel/cpu')
-rw-r--r-- | arch/x86/kernel/cpu/intel.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c index cce0b6118d5..816f27f289b 100644 --- a/arch/x86/kernel/cpu/intel.c +++ b/arch/x86/kernel/cpu/intel.c @@ -307,12 +307,11 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c) set_cpu_cap(c, X86_FEATURE_P4); if (c->x86 == 6) set_cpu_cap(c, X86_FEATURE_P3); +#endif if (cpu_has_bts) ptrace_bts_init_intel(c); -#endif - detect_extended_topology(c); if (!cpu_has(c, X86_FEATURE_XTOPOLOGY)) { /* |