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authorIngo Molnar <mingo@elte.hu>2008-12-23 16:29:31 +0100
committerIngo Molnar <mingo@elte.hu>2008-12-23 16:29:31 +0100
commit7e3cbc3f774f31ecd88a51edae3d9377f60a4c00 (patch)
treef5aa6a587ba2cf796d11c4e49682552580ba65a2 /arch/x86/kernel/cpu
parent345077cd98ff5532b2d1158013c3fec7b1ae85ec (diff)
parentf4166c54bfe04f64603974058e44fbd7cfef0ccc (diff)
Merge branch 'x86/ptrace' into x86/tsc
Conflicts: arch/x86/kernel/cpu/intel.c
Diffstat (limited to 'arch/x86/kernel/cpu')
-rw-r--r--arch/x86/kernel/cpu/intel.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index b21c37c060a..ccfd2047630 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -324,12 +324,11 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c)
set_cpu_cap(c, X86_FEATURE_P4);
if (c->x86 == 6)
set_cpu_cap(c, X86_FEATURE_P3);
+#endif
if (cpu_has_bts)
ptrace_bts_init_intel(c);
-#endif
-
if (!cpu_has(c, X86_FEATURE_XTOPOLOGY)) {
/*
* let's use the legacy cpuid vector 0x1 and 0x4 for topology