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| author | Ingo Molnar <mingo@elte.hu> | 2009-03-12 13:16:18 +0100 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2009-03-12 13:16:18 +0100 |
| commit | f8cb22cbb8383c9f41e6ccbcd4fb94edb1048bda (patch) | |
| tree | 9b3a333224ec895c053a694dcaff526502b84e6c /arch/x86/mm/pageattr.c | |
| parent | 044d408409cc4e1bc75c886e27ca85c270db104c (diff) | |
| parent | ebdcc81c71937b30e09110c02a1e8a21fa770b6f (diff) | |
Merge branch 'linus' into irq/genirq
Diffstat (limited to 'arch/x86/mm/pageattr.c')
| -rw-r--r-- | arch/x86/mm/pageattr.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c index 7be47d1a97e..7233bd7e357 100644 --- a/arch/x86/mm/pageattr.c +++ b/arch/x86/mm/pageattr.c @@ -515,6 +515,17 @@ static int split_large_page(pte_t *kpte, unsigned long address) * primary protection behavior: */ __set_pmd_pte(kpte, address, mk_pte(base, __pgprot(_KERNPG_TABLE))); + + /* + * Intel Atom errata AAH41 workaround. + * + * The real fix should be in hw or in a microcode update, but + * we also probabilistically try to reduce the window of having + * a large TLB mixed with 4K TLBs while instruction fetches are + * going on. + */ + __flush_tlb_all(); + base = NULL; out_unlock: |