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| author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2009-03-24 13:38:30 +1100 |
|---|---|---|
| committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2009-03-24 13:38:30 +1100 |
| commit | 9e41d9597e7825ec20d690013d32bcec5f3fe16a (patch) | |
| tree | ac6fea59e9a4a1c2183d6bbd6ffa760680673afb /arch/x86/mm/pageattr.c | |
| parent | 77ecfe8d427f554fabbf258e9d789f1d4c3afd63 (diff) | |
| parent | 8e0ee43bc2c3e19db56a4adaa9a9b04ce885cd84 (diff) | |
Merge commit 'origin/master' into next
Diffstat (limited to 'arch/x86/mm/pageattr.c')
| -rw-r--r-- | arch/x86/mm/pageattr.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c index 7be47d1a97e..7233bd7e357 100644 --- a/arch/x86/mm/pageattr.c +++ b/arch/x86/mm/pageattr.c @@ -515,6 +515,17 @@ static int split_large_page(pte_t *kpte, unsigned long address) * primary protection behavior: */ __set_pmd_pte(kpte, address, mk_pte(base, __pgprot(_KERNPG_TABLE))); + + /* + * Intel Atom errata AAH41 workaround. + * + * The real fix should be in hw or in a microcode update, but + * we also probabilistically try to reduce the window of having + * a large TLB mixed with 4K TLBs while instruction fetches are + * going on. + */ + __flush_tlb_all(); + base = NULL; out_unlock: |