diff options
author | Nicolas Pitre <nico@cam.org> | 2009-03-15 21:41:23 -0400 |
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committer | Nicolas Pitre <nico@cam.org> | 2009-03-15 21:41:23 -0400 |
commit | d6f818f71fa5db79969aaecba302745199376169 (patch) | |
tree | fcdedce488db0f80c7a816e0b52df83a01972838 /arch/x86/oprofile | |
parent | ace14b82633960a2b6bf6a0b2640c63872a65562 (diff) | |
parent | 305b07680f6c6a7e59f996c5bd85f009caff5bb1 (diff) |
Merge commit '305b07680f' into orion/master
Diffstat (limited to 'arch/x86/oprofile')
-rw-r--r-- | arch/x86/oprofile/op_model_ppro.c | 14 |
1 files changed, 12 insertions, 2 deletions
diff --git a/arch/x86/oprofile/op_model_ppro.c b/arch/x86/oprofile/op_model_ppro.c index e9f80c744cf..10131fbdaad 100644 --- a/arch/x86/oprofile/op_model_ppro.c +++ b/arch/x86/oprofile/op_model_ppro.c @@ -78,8 +78,18 @@ static void ppro_setup_ctrs(struct op_msrs const * const msrs) if (cpu_has_arch_perfmon) { union cpuid10_eax eax; eax.full = cpuid_eax(0xa); - if (counter_width < eax.split.bit_width) - counter_width = eax.split.bit_width; + + /* + * For Core2 (family 6, model 15), don't reset the + * counter width: + */ + if (!(eax.split.version_id == 0 && + current_cpu_data.x86 == 6 && + current_cpu_data.x86_model == 15)) { + + if (counter_width < eax.split.bit_width) + counter_width = eax.split.bit_width; + } } /* clear all counters */ |