diff options
author | Paul Mackerras <paulus@samba.org> | 2006-05-19 15:02:42 +1000 |
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committer | Paul Mackerras <paulus@samba.org> | 2006-05-19 15:02:42 +1000 |
commit | 3c06da5ae5358e9d325d541a053e1059e9654bcc (patch) | |
tree | 04c953cc82fe57cff248ac523095cd4f0d9611a7 /arch/x86_64/kernel/mpparse.c | |
parent | 4d1f3f25d9c303d1ce63b42cc94c54ac0ab2e950 (diff) | |
parent | a54c9d30dbb06391ec4422aaf0e1dc2c8c53bd3e (diff) |
Merge ../linux-2.6
Diffstat (limited to 'arch/x86_64/kernel/mpparse.c')
-rw-r--r-- | arch/x86_64/kernel/mpparse.c | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/arch/x86_64/kernel/mpparse.c b/arch/x86_64/kernel/mpparse.c index b17cf3eba35..083da7e606b 100644 --- a/arch/x86_64/kernel/mpparse.c +++ b/arch/x86_64/kernel/mpparse.c @@ -968,7 +968,17 @@ int mp_register_gsi(u32 gsi, int triggering, int polarity) */ int irq = gsi; if (gsi < MAX_GSI_NUM) { - if (gsi > 15) + /* + * Retain the VIA chipset work-around (gsi > 15), but + * avoid a problem where the 8254 timer (IRQ0) is setup + * via an override (so it's not on pin 0 of the ioapic), + * and at the same time, the pin 0 interrupt is a PCI + * type. The gsi > 15 test could cause these two pins + * to be shared as IRQ0, and they are not shareable. + * So test for this condition, and if necessary, avoid + * the pin collision. + */ + if (gsi > 15 || (gsi == 0 && !timer_uses_ioapic_pin_0)) gsi = pci_irq++; /* * Don't assign IRQ used by ACPI SCI |