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authorAndi Kleen <ak@suse.de>2006-10-22 00:41:15 +0200
committerAndi Kleen <andi@basil.nowhere.org>2006-10-22 00:41:15 +0200
commitaa026ede513b7d672fa7d9106b2f2a475455dcf2 (patch)
tree13a4e7934f3597336ebdfde1d720b5f2c877ad6e /arch/x86_64
parentcb7fabcf9d4340b61f012cc7e8e3d7ff5c4f441c (diff)
[PATCH] x86-64: Fix C3 timer test
There was a typo in the C3 latency test to decide of the TSC should be used or not. It used the C2 latency threshold, not the C3 one. Fix that. This should fix the time on various dual core laptops. Signed-off-by: Andi Kleen <ak@suse.de>
Diffstat (limited to 'arch/x86_64')
-rw-r--r--arch/x86_64/kernel/time.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86_64/kernel/time.c b/arch/x86_64/kernel/time.c
index 1ba5a442ac3..88722f11ca1 100644
--- a/arch/x86_64/kernel/time.c
+++ b/arch/x86_64/kernel/time.c
@@ -948,7 +948,7 @@ __cpuinit int unsynchronized_tsc(void)
if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) {
#ifdef CONFIG_ACPI
/* But TSC doesn't tick in C3 so don't use it there */
- if (acpi_fadt.length > 0 && acpi_fadt.plvl3_lat < 100)
+ if (acpi_fadt.length > 0 && acpi_fadt.plvl3_lat < 1000)
return 1;
#endif
return 0;