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authorMuli Ben-Yehuda <muli@il.ibm.com>2006-09-26 10:52:33 +0200
committerAndi Kleen <andi@basil.nowhere.org>2006-09-26 10:52:33 +0200
commitde684652f34f57cb60d4d78d09139a0e0c5e7b1b (patch)
treebc3f7dd5a91086ceb51d4cb5fcc1f77095f2b713 /arch/x86_64
parent2ade2920dcefdf5595c6380ebed131c964190855 (diff)
[PATCH] print whether CONFIG_IOMMU_DEBUG is enabled
Signed-off-by: Muli Ben-Yehuda <muli@il.ibm.com> Signed-off-by: Jon Mason <jdmason@us.ibm.com> Signed-off-by: Andi Kleen <ak@suse.de>
Diffstat (limited to 'arch/x86_64')
-rw-r--r--arch/x86_64/kernel/pci-calgary.c14
1 files changed, 10 insertions, 4 deletions
diff --git a/arch/x86_64/kernel/pci-calgary.c b/arch/x86_64/kernel/pci-calgary.c
index caf84e4e4ca..ebe4e930b64 100644
--- a/arch/x86_64/kernel/pci-calgary.c
+++ b/arch/x86_64/kernel/pci-calgary.c
@@ -127,15 +127,19 @@ static void tce_cache_blast(struct iommu_table *tbl);
/* enable this to stress test the chip's TCE cache */
#ifdef CONFIG_IOMMU_DEBUG
+int debugging __read_mostly = 1;
+
static inline void tce_cache_blast_stress(struct iommu_table *tbl)
{
tce_cache_blast(tbl);
}
-#else
+#else /* debugging is disabled */
+int debugging __read_mostly = 0;
+
static inline void tce_cache_blast_stress(struct iommu_table *tbl)
{
}
-#endif /* BLAST_TCE_CACHE_ON_UNMAP */
+#endif /* CONFIG_IOMMU_DEBUG */
static inline unsigned int num_dma_pages(unsigned long dma, unsigned int dmalen)
{
@@ -944,8 +948,10 @@ void __init detect_calgary(void)
if (calgary_found) {
iommu_detected = 1;
calgary_detected = 1;
- printk(KERN_INFO "PCI-DMA: Calgary IOMMU detected. "
- "TCE table spec is %d.\n", specified_table_size);
+ printk(KERN_INFO "PCI-DMA: Calgary IOMMU detected.\n");
+ printk(KERN_INFO "PCI-DMA: Calgary TCE table spec is %d, "
+ "CONFIG_IOMMU_DEBUG is %s.\n", specified_table_size,
+ debugging ? "enabled" : "disabled");
}
return;