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authorCatalin Marinas <catalin.marinas@arm.com>2007-09-25 16:49:45 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-10-12 23:43:27 +0100
commit180005c4efb76a81fd0abcef4c2412d238eea20c (patch)
treefbc9e78fce9c9c071d97e59a77a9e2fb8d7c3c1a /arch
parentc1f438f5eec867707022e5f33bec5e91ec12f6e7 (diff)
[ARM] 4585/1: Correctly identify the CPU architecture version
The cpu_architecture() function in arch/arm/kernel/setup.c only works with cores produced by ARM Ltd. The more generic approach is to read the ID_MMFR0 register and check for the VMSA or PMSA version supported. With this patch, the ARM11MPCore would be reported as ARMv7 since its MMU is compatible with ARMv7. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/kernel/setup.c21
1 files changed, 17 insertions, 4 deletions
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 4de432ec903..efac7df72d6 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -304,10 +304,23 @@ int cpu_architecture(void)
cpu_arch = (processor_id >> 16) & 7;
if (cpu_arch)
cpu_arch += CPU_ARCH_ARMv3;
- } else {
- /* the revised CPUID */
- cpu_arch = ((processor_id >> 12) & 0xf) - 0xb + CPU_ARCH_ARMv6;
- }
+ } else if ((processor_id & 0x000f0000) == 0x000f0000) {
+ unsigned int mmfr0;
+
+ /* Revised CPUID format. Read the Memory Model Feature
+ * Register 0 and check for VMSAv7 or PMSAv7 */
+ asm("mrc p15, 0, %0, c0, c1, 4"
+ : "=r" (mmfr0));
+ if ((mmfr0 & 0x0000000f) == 0x00000003 ||
+ (mmfr0 & 0x000000f0) == 0x00000030)
+ cpu_arch = CPU_ARCH_ARMv7;
+ else if ((mmfr0 & 0x0000000f) == 0x00000002 ||
+ (mmfr0 & 0x000000f0) == 0x00000020)
+ cpu_arch = CPU_ARCH_ARMv6;
+ else
+ cpu_arch = CPU_ARCH_UNKNOWN;
+ } else
+ cpu_arch = CPU_ARCH_UNKNOWN;
return cpu_arch;
}