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authorLinus Torvalds <torvalds@woody.linux-foundation.org>2007-10-14 16:47:05 -0700
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-10-14 16:47:05 -0700
commit59d66ce238e573fe3369427e91a8291f2cf67891 (patch)
tree2d6be8e29e7cceaaa2d1ce9a8957bda103467a7a /arch
parent5c0d6b34d6ee11ff979cbdac9a59b47a74cb9f43 (diff)
parent89039b37be7c34194db0e72f956a5f02cfa30941 (diff)
Merge git://git.kernel.org/pub/scm/linux/kernel/git/tglx/linux-2.6-x86
* git://git.kernel.org/pub/scm/linux/kernel/git/tglx/linux-2.6-x86: x86: force timer broadcast on late AMD C1E detection x86: move local APIC timer init to the end of start_secondary() clockevents: introduce force broadcast notifier x86: fix missing include for vsyscall
Diffstat (limited to 'arch')
-rw-r--r--arch/x86/kernel/alternative.c1
-rw-r--r--arch/x86/kernel/apic_64.c26
-rw-r--r--arch/x86/kernel/smpboot_64.c7
3 files changed, 29 insertions, 5 deletions
diff --git a/arch/x86/kernel/alternative.c b/arch/x86/kernel/alternative.c
index bd72d94e713..11b03d3c6fd 100644
--- a/arch/x86/kernel/alternative.c
+++ b/arch/x86/kernel/alternative.c
@@ -10,6 +10,7 @@
#include <asm/pgtable.h>
#include <asm/mce.h>
#include <asm/nmi.h>
+#include <asm/vsyscall.h>
#define MAX_PATCH_LEN (255-1)
diff --git a/arch/x86/kernel/apic_64.c b/arch/x86/kernel/apic_64.c
index 395928de28e..09b82093bc7 100644
--- a/arch/x86/kernel/apic_64.c
+++ b/arch/x86/kernel/apic_64.c
@@ -964,8 +964,34 @@ void __init setup_boot_APIC_clock (void)
setup_APIC_timer();
}
+/*
+ * AMD C1E enabled CPUs have a real nasty problem: Some BIOSes set the
+ * C1E flag only in the secondary CPU, so when we detect the wreckage
+ * we already have enabled the boot CPU local apic timer. Check, if
+ * disable_apic_timer is set and the DUMMY flag is cleared. If yes,
+ * set the DUMMY flag again and force the broadcast mode in the
+ * clockevents layer.
+ */
+void __cpuinit check_boot_apic_timer_broadcast(void)
+{
+ struct clock_event_device *levt = &per_cpu(lapic_events, boot_cpu_id);
+
+ if (!disable_apic_timer ||
+ (lapic_clockevent.features & CLOCK_EVT_FEAT_DUMMY))
+ return;
+
+ printk(KERN_INFO "AMD C1E detected late. Force timer broadcast.\n");
+ lapic_clockevent.features |= CLOCK_EVT_FEAT_DUMMY;
+ levt->features |= CLOCK_EVT_FEAT_DUMMY;
+
+ local_irq_enable();
+ clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_FORCE, &boot_cpu_id);
+ local_irq_disable();
+}
+
void __cpuinit setup_secondary_APIC_clock(void)
{
+ check_boot_apic_timer_broadcast();
setup_APIC_timer();
}
diff --git a/arch/x86/kernel/smpboot_64.c b/arch/x86/kernel/smpboot_64.c
index 57ccf7cb6b9..720a7d1f886 100644
--- a/arch/x86/kernel/smpboot_64.c
+++ b/arch/x86/kernel/smpboot_64.c
@@ -335,11 +335,6 @@ void __cpuinit start_secondary(void)
*/
check_tsc_sync_target();
- Dprintk("cpu %d: setting up apic clock\n", smp_processor_id());
- setup_secondary_APIC_clock();
-
- Dprintk("cpu %d: enabling apic timer\n", smp_processor_id());
-
if (nmi_watchdog == NMI_IO_APIC) {
disable_8259A_irq(0);
enable_NMI_through_LVT0(NULL);
@@ -374,6 +369,8 @@ void __cpuinit start_secondary(void)
unlock_ipi_call_lock();
+ setup_secondary_APIC_clock();
+
cpu_idle();
}