diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 2010-02-27 12:53:39 +0100 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2010-02-27 12:53:39 +0100 |
| commit | f1d39e6ed7ad71048db3b2835dccf3a5a01fab69 (patch) | |
| tree | 9210d1ee2b97635e46dc355f9a22b03b9eb7aaf2 /arch | |
| parent | 36946d7387ee6f3a331563a1d839240924b65798 (diff) | |
MIPS: Loongson: Remove pointless sample_lock from oprofile code.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/mips/oprofile/op_model_loongson2.c | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/arch/mips/oprofile/op_model_loongson2.c b/arch/mips/oprofile/op_model_loongson2.c index f7f9a32c722..29e2326b625 100644 --- a/arch/mips/oprofile/op_model_loongson2.c +++ b/arch/mips/oprofile/op_model_loongson2.c @@ -47,8 +47,6 @@ static struct loongson2_register_config { int cnt1_enabled, cnt2_enabled; } reg; -static DEFINE_SPINLOCK(sample_lock); - static char *oprofid = "LoongsonPerf"; static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id); /* Compute all of the registers in preparation for enabling profiling. */ @@ -115,7 +113,6 @@ static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id) uint64_t counter, counter1, counter2; struct pt_regs *regs = get_irq_regs(); int enabled; - unsigned long flags; /* * LOONGSON2 defines two 32-bit performance counters. @@ -136,8 +133,6 @@ static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id) counter1 = counter & 0xffffffff; counter2 = counter >> 32; - spin_lock_irqsave(&sample_lock, flags); - if (counter1 & LOONGSON2_PERFCNT_OVERFLOW) { if (reg.cnt1_enabled) oprofile_add_sample(regs, 0); @@ -149,8 +144,6 @@ static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id) counter2 = reg.reset_counter2; } - spin_unlock_irqrestore(&sample_lock, flags); - write_c0_perfcnt((counter2 << 32) | counter1); return IRQ_HANDLED; |