diff options
| author | Paul Mundt <lethal@linux-sh.org> | 2008-07-02 13:58:38 +0900 |
|---|---|---|
| committer | Paul Mundt <lethal@linux-sh.org> | 2008-07-28 18:10:32 +0900 |
| commit | ef9247ef89be79ffbd9faaf722e05b7bed14fc1e (patch) | |
| tree | 6d8afba92435f2df0290d198b5a742c6a75d048d /arch | |
| parent | d88a3ea6fa4c98d482240a6a85945ed448b7671d (diff) | |
sh: Tidy up the SH-3 exception vector table.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/sh/kernel/cpu/sh3/ex.S | 38 |
1 files changed, 19 insertions, 19 deletions
diff --git a/arch/sh/kernel/cpu/sh3/ex.S b/arch/sh/kernel/cpu/sh3/ex.S index 11b6d9c6eda..dac42972689 100644 --- a/arch/sh/kernel/cpu/sh3/ex.S +++ b/arch/sh/kernel/cpu/sh3/ex.S @@ -4,7 +4,7 @@ * The SH-3 and SH-4 exception vector table. * Copyright (C) 1999, 2000, 2002 Niibe Yutaka - * Copyright (C) 2003 - 2006 Paul Mundt + * Copyright (C) 2003 - 2008 Paul Mundt * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive @@ -12,13 +12,30 @@ */ #include <linux/linkage.h> +#if !defined(CONFIG_MMU) +#define tlb_miss_load exception_error +#define tlb_miss_store exception_error +#define initial_page_write exception_error +#define tlb_protection_violation_load exception_error +#define tlb_protection_violation_store exception_error +#define address_error_load exception_error +#define address_error_store exception_error +#endif + +#if !defined(CONFIG_SH_FPU) +#define fpu_error_trap_handler exception_error +#endif + +#if !defined(CONFIG_KGDB_NMI) +#define kgdb_handle_exception exception_error +#endif + .align 2 .data ENTRY(exception_handling_table) .long exception_error /* 000 */ .long exception_error -#if defined(CONFIG_MMU) .long tlb_miss_load /* 040 */ .long tlb_miss_store .long initial_page_write @@ -26,30 +43,13 @@ ENTRY(exception_handling_table) .long tlb_protection_violation_store .long address_error_load .long address_error_store /* 100 */ -#else - .long exception_error ! tlb miss load /* 040 */ - .long exception_error ! tlb miss store - .long exception_error ! initial page write - .long exception_error ! tlb prot violation load - .long exception_error ! tlb prot violation store - .long exception_error ! address error load - .long exception_error ! address error store /* 100 */ -#endif -#if defined(CONFIG_SH_FPU) .long fpu_error_trap_handler /* 120 */ -#else - .long exception_error /* 120 */ -#endif .long exception_error /* 140 */ .long system_call ! Unconditional Trap /* 160 */ .long exception_error ! reserved_instruction (filled by trap_init) /* 180 */ .long exception_error ! illegal_slot_instruction (filled by trap_init) /*1A0*/ ENTRY(nmi_slot) -#if defined (CONFIG_KGDB_NMI) .long kgdb_handle_exception /* 1C0 */ ! Allow trap to debugger -#else - .long exception_none /* 1C0 */ ! Not implemented yet -#endif ENTRY(user_break_point_trap) .long break_point_trap /* 1E0 */ |