diff options
| author | H. Peter Anvin <hpa@zytor.com> | 2007-02-13 13:26:24 +0100 |
|---|---|---|
| committer | Andi Kleen <andi@basil.nowhere.org> | 2007-02-13 13:26:24 +0100 |
| commit | 30b82ea08c3365a6fc916250ff2ad634717fc81b (patch) | |
| tree | 0fe032e91eaf1d3b8e89a6ff231a0aa97941e56a /arch | |
| parent | 5d0e600d903caa09e790824cc5812f0d97113b23 (diff) | |
[PATCH] i386: All Transmeta CPUs have constant TSCs
All Transmeta CPUs ever produced have constant-rate TSCs.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: Andi Kleen <ak@suse.de>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/i386/kernel/cpu/transmeta.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/i386/kernel/cpu/transmeta.c b/arch/i386/kernel/cpu/transmeta.c index 4056fb7d2cd..b536e810d27 100644 --- a/arch/i386/kernel/cpu/transmeta.c +++ b/arch/i386/kernel/cpu/transmeta.c @@ -72,6 +72,9 @@ static void __cpuinit init_transmeta(struct cpuinfo_x86 *c) wrmsr(0x80860004, ~0, uk); c->x86_capability[0] = cpuid_edx(0x00000001); wrmsr(0x80860004, cap_mask, uk); + + /* All Transmeta CPUs have a constant TSC */ + set_bit(X86_FEATURE_CONSTANT_TSC, c->x86_capability); /* If we can run i686 user-space code, call us an i686 */ #define USER686 (X86_FEATURE_TSC|X86_FEATURE_CX8|X86_FEATURE_CMOV) |