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authorRalf Baechle <ralf@linux-mips.org>2006-11-01 00:22:00 +0000
committerRalf Baechle <ralf@linux-mips.org>2006-11-01 17:46:09 +0000
commit64c590b7a62ae1272fe4afd7b915de314591f35e (patch)
treeec18ea45ad4d6f919bce7c52e19baec605ce529c /arch
parentcb56837ea5f15fa5279fd490f292134c3a92e5de (diff)
[MIPS] SMTC: Synchronize cp0 counters on bootup.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/mips/kernel/smtc.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c
index cc1f7474f7d..3b78caf112f 100644
--- a/arch/mips/kernel/smtc.c
+++ b/arch/mips/kernel/smtc.c
@@ -476,6 +476,7 @@ void mipsmt_prepare_cpus(void)
write_vpe_c0_compare(0);
/* Propagate Config7 */
write_vpe_c0_config7(read_c0_config7());
+ write_vpe_c0_count(read_c0_count());
}
/* enable multi-threading within VPE */
write_vpe_c0_vpecontrol(read_vpe_c0_vpecontrol() | VPECONTROL_TE);