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authorLuis R. Rodriguez <lrodriguez@atheros.com>2009-10-19 02:33:34 -0400
committerJohn W. Linville <linville@tuxdriver.com>2009-10-30 16:50:36 -0400
commitc75724d1747230abdd37d0594ac5277b867befd4 (patch)
tree76ba22226b25c46ed01016f33ce72b793d7ec3cf /arch
parent8564328d85f69121744d8337124857a2e726239b (diff)
ath9k_hw: change the way we initialize the pll for ar9271
We adjust the core clock for ar9271 to 117 MHz; this also requires us to adjust the baud divider based on the targetted baud rate. Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'arch')
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