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authorVenkatesh Pallipadi <venkatesh.pallipadi@intel.com>2007-02-13 13:26:22 +0100
committerAndi Kleen <andi@basil.nowhere.org>2007-02-13 13:26:22 +0100
commit1676193937a538fdb92a2916a86a705093cfd613 (patch)
tree4d7a44ec0ab824bd821df2bc40d6395856f69f69 /block/elevator.c
parent4c3cbf75b262433afc90b5c35510d1e5744d3b94 (diff)
[PATCH] x86-64: Handle 32 bit PerfMon Counter writes cleanly in x86_64 nmi_watchdog
P6 CPUs and Core/Core 2 CPUs which has 'architectural perf mon' feature, only supports write of low 32 bits in Performance Monitoring Counters. Bits 32..39 are sign extended based on bit 31 and bits 40..63 are reserved and should be zero. This patch: Change x86_64 nmi handler to handle this case cleanly. Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by: Andi Kleen <ak@suse.de>
Diffstat (limited to 'block/elevator.c')
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