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authorBob Moore <robert.moore@intel.com>2009-03-06 10:05:18 +0800
committerLen Brown <len.brown@intel.com>2009-03-27 12:11:02 -0400
commitd4913dc6d0c680aa106d1d80b5ad2a9325367afd (patch)
tree4ce6e658b21a2bc69e7c57caa6f7dfa1ff8ec53b /drivers/acpi/acpica/hwsleep.c
parent768aaaf196e8a40f5cfc792d9d365795cc52ed13 (diff)
ACPICA: Formatting update - no functional changes
Split long lines, update comments. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
Diffstat (limited to 'drivers/acpi/acpica/hwsleep.c')
-rw-r--r--drivers/acpi/acpica/hwsleep.c14
1 files changed, 6 insertions, 8 deletions
diff --git a/drivers/acpi/acpica/hwsleep.c b/drivers/acpi/acpica/hwsleep.c
index 4d14b49a0f6..2ea4c59e883 100644
--- a/drivers/acpi/acpica/hwsleep.c
+++ b/drivers/acpi/acpica/hwsleep.c
@@ -349,8 +349,8 @@ acpi_status asmlinkage acpi_enter_sleep_state(u8 sleep_state)
* Wait ten seconds, then try again. This is to get S4/S5 to work on
* all machines.
*
- * We wait so long to allow chipsets that poll this reg very slowly to
- * still read the right value. Ideally, this block would go
+ * We wait so long to allow chipsets that poll this reg very slowly
+ * to still read the right value. Ideally, this block would go
* away entirely.
*/
acpi_os_stall(10000000);
@@ -501,12 +501,10 @@ acpi_status acpi_leave_sleep_state_prep(u8 sleep_state)
/* Insert the SLP_TYP bits */
- pm1a_control |=
- (acpi_gbl_sleep_type_a << sleep_type_reg_info->
- bit_position);
- pm1b_control |=
- (acpi_gbl_sleep_type_b << sleep_type_reg_info->
- bit_position);
+ pm1a_control |= (acpi_gbl_sleep_type_a <<
+ sleep_type_reg_info->bit_position);
+ pm1b_control |= (acpi_gbl_sleep_type_b <<
+ sleep_type_reg_info->bit_position);
/* Write the control registers and ignore any errors */