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authorPaul Mundt <lethal@linux-sh.org>2009-09-16 13:48:32 +0900
committerPaul Mundt <lethal@linux-sh.org>2009-09-16 13:48:32 +0900
commitea88023b3491a384575ebcd5e8a449e841a28a24 (patch)
treef46e3d8302e44dc55ce31823501e100472d29683 /drivers/ata/sata_sil.c
parenta6f15ade97989d414e9bf33874c9d5d1f39808ec (diff)
parent0cb583fd2862f19ea88b02eb307d11c09e51e2f8 (diff)
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
Conflicts: arch/sh/kernel/vmlinux.lds.S
Diffstat (limited to 'drivers/ata/sata_sil.c')
-rw-r--r--drivers/ata/sata_sil.c13
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/ata/sata_sil.c b/drivers/ata/sata_sil.c
index 35bd5cc7f28..3cb69d5fb81 100644
--- a/drivers/ata/sata_sil.c
+++ b/drivers/ata/sata_sil.c
@@ -565,6 +565,19 @@ static void sil_freeze(struct ata_port *ap)
tmp |= SIL_MASK_IDE0_INT << ap->port_no;
writel(tmp, mmio_base + SIL_SYSCFG);
readl(mmio_base + SIL_SYSCFG); /* flush */
+
+ /* Ensure DMA_ENABLE is off.
+ *
+ * This is because the controller will not give us access to the
+ * taskfile registers while a DMA is in progress
+ */
+ iowrite8(ioread8(ap->ioaddr.bmdma_addr) & ~SIL_DMA_ENABLE,
+ ap->ioaddr.bmdma_addr);
+
+ /* According to ata_bmdma_stop, an HDMA transition requires
+ * on PIO cycle. But we can't read a taskfile register.
+ */
+ ioread8(ap->ioaddr.bmdma_addr);
}
static void sil_thaw(struct ata_port *ap)