diff options
| author | Thomas Hellstrom <thomas-at-tungstengraphics-dot-com> | 2007-01-08 21:03:23 +1100 |
|---|---|---|
| committer | Dave Airlie <airlied@linux.ie> | 2007-02-08 13:24:25 +1100 |
| commit | 76f625511e61f9d5561885c77d2ff1436ed83797 (patch) | |
| tree | bc590d60461126dee15d9594b6b4eaf8dc578b9b /drivers/char/drm | |
| parent | 21d37bbc65e39a26856de6b14be371ff24e0d03f (diff) | |
via: some PCI posting flushes
Signed-off-by: Dave Airlie <airlied@linux.ie>
Diffstat (limited to 'drivers/char/drm')
| -rw-r--r-- | drivers/char/drm/via_dma.c | 4 | ||||
| -rw-r--r-- | drivers/char/drm/via_dmablit.c | 2 |
2 files changed, 5 insertions, 1 deletions
diff --git a/drivers/char/drm/via_dma.c b/drivers/char/drm/via_dma.c index a691ae74129..2f72cbefc2f 100644 --- a/drivers/char/drm/via_dma.c +++ b/drivers/char/drm/via_dma.c @@ -480,6 +480,7 @@ static int via_hook_segment(drm_via_private_t * dev_priv, VIA_WRITE(VIA_REG_TRANSET, (HC_ParaType_PreCR << 16)); VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_hi); VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_lo); + VIA_READ(VIA_REG_TRANSPACE); } } return paused; @@ -557,8 +558,9 @@ static void via_cmdbuf_start(drm_via_private_t * dev_priv) VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_hi); VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_lo); - + DRM_WRITEMEMORYBARRIER(); VIA_WRITE(VIA_REG_TRANSPACE, command | HC_HAGPCMNT_MASK); + VIA_READ(VIA_REG_TRANSPACE); } static void via_pad_cache(drm_via_private_t * dev_priv, int qwords) diff --git a/drivers/char/drm/via_dmablit.c b/drivers/char/drm/via_dmablit.c index 806f9ce5f47..2054d577371 100644 --- a/drivers/char/drm/via_dmablit.c +++ b/drivers/char/drm/via_dmablit.c @@ -218,7 +218,9 @@ via_fire_dmablit(drm_device_t *dev, drm_via_sg_info_t *vsg, int engine) VIA_WRITE(VIA_PCI_DMA_MR0 + engine*0x04, VIA_DMA_MR_CM | VIA_DMA_MR_TDIE); VIA_WRITE(VIA_PCI_DMA_BCR0 + engine*0x10, 0); VIA_WRITE(VIA_PCI_DMA_DPR0 + engine*0x10, vsg->chain_start); + DRM_WRITEMEMORYBARRIER(); VIA_WRITE(VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_DE | VIA_DMA_CSR_TS); + VIA_READ(VIA_PCI_DMA_CSR0 + engine*0x04); } /* |