diff options
| author | Jesse Barnes <jbarnes@virtuousgeek.org> | 2009-09-11 12:25:56 -0700 |
|---|---|---|
| committer | Jesse Barnes <jbarnes@virtuousgeek.org> | 2009-09-17 14:46:48 -0700 |
| commit | d660467c3ff2a0b7413e1b7a51452b34ffb49e5f (patch) | |
| tree | 39c562957364ba7c23c7d91b99b5e3041dcefc32 /drivers/gpu | |
| parent | decbbcda2965fadb9fbaaf4f9e057ae554aa3cfe (diff) | |
drm/i915: prevent FIFO calculation overflows on 32 bits with high dotclocks
A very high dotclock (e.g. 229500kHz as reported by Anton) can cause
the entries_required variable to overflow, potentially leading to a
FIFO watermark value that's too low to support the given mode. Split
the division across the calculation to avoid this.
Cc: stable@kernel.org
Reported-by: Anton Khirnov <wyskas@gmail.com>
Tested-by: Anton Khirnov <wyskas@gmail.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index b6743281a97..44234150e84 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -2119,7 +2119,14 @@ static unsigned long intel_calculate_wm(unsigned long clock_in_khz, { long entries_required, wm_size; - entries_required = (clock_in_khz * pixel_size * latency_ns) / 1000000; + /* + * Note: we need to make sure we don't overflow for various clock & + * latency values. + * clocks go from a few thousand to several hundred thousand. + * latency is usually a few thousand + */ + entries_required = ((clock_in_khz / 1000) * pixel_size * latency_ns) / + 1000; entries_required /= wm->cacheline_size; DRM_DEBUG("FIFO entries required for mode: %d\n", entries_required); |